UPD78F0550MA-FAA-AX Renesas Electronics America, UPD78F0550MA-FAA-AX Datasheet - Page 391

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UPD78F0550MA-FAA-AX

Manufacturer Part Number
UPD78F0550MA-FAA-AX
Description
MCU 8BIT 16-SSOP
Manufacturer
Renesas Electronics America
Series
78K0/Kx2-Lr
Datasheet

Specifications of UPD78F0550MA-FAA-AX

Package / Case
*
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Speed
10MHz
Number Of I /o
12
Core Processor
78K/0
Program Memory Type
FLASH
Ram Size
384 x 8
Program Memory Size
4KB (4K x 8)
Data Converters
A/D 4x10b
Oscillator Type
Internal
Peripherals
LVD, POR, PWM, WDT
Connectivity
I²C, LIN, UART/USART
Core Size
8-Bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD78F0550MA-FAA-AX
Manufacturer:
Renesas
Quantity:
800
Part Number:
UPD78F0550MA-FAA-AX
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
<R>
The setting methods are described below.
<Change the channel>
<Complete A/D conversion>
<1> Set the A/D conversion time and the operation mode by using bits 5 to 1 (FR2 to FR0, LV1, and LV0) of
<2> Set bit 0 (ADCE) of ADM0 to 1.
<3> Set the channel to be used to analog input by using the A/D port configuration registers 0, 1 (ADPC0,
<4> Set the PGA operation to set the PGA output or the single AMP operation to set the operational amplifier
<5> Select a channel to be used by using the analog input channel specification register (ADS).
<6> Set bit 7 (ADCS) of ADM0 to 1 to start A/D conversion.
<7> When one A/D conversion has been completed, an interrupt request signal (INTAD) is generated.
<8> Transfer the A/D conversion data to the A/D conversion result register (ADCR, ADCRH).
<9> Set bit 0 (ADMK) of the interrupt mask flag register 1L (MK1L) to 1
<10> Change the channel by using ADS to start A/D conversion.
<11> Clear bit 0 (ADIF) of the interrupt request flag register 1L (IF1L) to 0.
<12> Clear ADMK to 0
<13> When one A/D conversion has been completed, an interrupt request signal (INTAD) is generated.
<14> Transfer the A/D conversion data to the A/D conversion result register (ADCR, ADCRL, ADCRH).
<15> Clear ADCS to 0.
<16> Clear ADCE to 0.
Note Execute this only if interrupt servicing is used for A/D conversion.
Cautions 1. Make sure the period of <2> to <6> is 1 s or more.
the A/D converter mode register 0 (ADM0).
ADPC1) and port mode registers 1, 2 (PM1, PM2).
output for analog input. (refer to CHAPTER 13 OPERATIONAL AMPLIFIERS).
2. If the timing of <2> is earlier than that of <4>, <2> may be performed any time.
3. <2> can be omitted. However, ignore data of the first conversion after <6> in this case.
4. The period from <7> to <13> differs from the conversion time set using bits 5 to 1 (FR2 to
FR0, LV1, LV0) of ADM0. The period from <10> to <13> is the conversion time set using
FR2 to FR0, LV1, and LV0.
Note
.
Preliminary User’s Manual U19111EJ2V1UD
CHAPTER 12 A/D CONVERTER
Note
.
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