UPD78F0552MA-FAA-AX Renesas Electronics America, UPD78F0552MA-FAA-AX Datasheet - Page 155

• Manufacturer Part Number: UPD78F0552MA-FAA-AX
• Description: MCU 8BIT 16-SSOP
• Manufacturer: Renesas Electronics America
• Series: 78K0/Kx2-Lr

Specifications of UPD78F0552MA-FAA-AX

• Core Processor: 78K/0
• Core Size: 8-Bit
• Speed: 10MHz
• Connectivity: I²C, LIN, UART/USART
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 9
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

<R>
78K0/Kx2-L
4.2.3 Port 2
Note Products with operational amplifier only
mode register 2 (PM2).
Amplifier) input.
10 to 4-12).
starting with the furthest pin from AV
/ANI0 to P27/ANI7 as an analog input, it is recommended to select a pin to use starting with the closest pin to AV
example, the P27/ANI7 pin in the 78K0/KC2-L (44-pin and 48-pin products)).
R01UH0028EJ0400 Rev.4.00
Sep 27, 2010
(
μ
P20/ANI0/
AMP0-
P21/ANI1/
AMP0OUT
PGAIN
P22/ANI2/
AMP0+
P23/ANI3
78K0/KY2-L
PD78F055x)
Port 2 is an I/O port with an output latch. Port 2 can be set to the input mode or output mode in 1-bit units using port
This port can also be used for A/D converter analog input, operational amplifier I/O, and PGA (Programmable Gain
When using P20/AMP0-/ANI0 to P27/ANI7, set the registers according to the pin function to be used (refer to Tables 4-
To use P20/AMP0-/ANI0 to P27/ANI7 as a digital input or a digital output, it is recommended to select a pin to use
16 Pins
Remark ADPC0:
−
−
−
−
Note
Note
Note
Digital I/O
selection
Analog input
selection
ADPC0 Register
Note
/
P20/ANI0/
AMP0-
P21/ANI1/
AMP0OUT
PGAIN
P22/ANI2/
AMP0+
P23/ANI3
P24/ANI4
P25/ANI5
PM2:
OPAMP0E: Bit 7 of operational amplifier 0 control register (AMP0M)
ADS:
20 Pins
−
−
Note
Table 4-10. Setting Functions of P20/ANI0/AMP0-, P22/ANI2/AMP0+ Pins
Note
Note
Note
Input mode
Output mode
Input mode
Output mode
PM2 Register
/
A/D port configuration register 0
Port mode register 2
Analog input channel specification register
(
μ
P20/ANI0/
AMP0-
P21/ANI1/
AMP0OUT
PGAIN
P22/ANI2/
AMP0+
P23/ANI3
P24/ANI4
P25/ANI5
P26/ANI6
78K0/KA2-L
PD78F056x)
25 Pins
−
Note
REF
Note
Note
Note
(for example, the P20/AMP0-/ANI0 pin in the 78K0/KC2-L). To use P20/AMP0-
0
1
/
OPAMP0E bit
P20/ANI0/
AMP0-
P21/ANI1/
AMP0OUT
PGAIN
P22/ANI2/
AMP0+
P23/ANI3
P24/ANI4
P25/ANI5
P26/ANI6
P27/ANI7
−
−
−
32 Pins
Note
Note
Note
Note
/
Selects ANIn.
Does not select ANIn.
Selects ANIn.
Does not select ANIn.
Selects ANIn.
Does not select ANIn.
Selects ANIn.
Does not select ANIn.
(
P20/ANI0/
AMP0-
P21/ANI1/
AMP0OUT
PGAIN
P22/ANI2/
AMP0+
P23/ANI3
μ
ADS Register
78K0/KB2-L
PD78F057x)
(n = 0, 2)
30 Pins
Note
−
−
−
−
Note
−
Note
Note
/
P20/ANI0/
AMP0-
P21/ANI1/
AMP0OUT
PGAIN
P22/ANI2/
AMP0+
P23/ANI3
P24/ANI4
P25/ANI5
P26/ANI6
40 Pins
Setting prohibited
Setting prohibited
Analog input (to be converted into
digital signals)
Analog input (not to be converted
into digital signals)
Setting prohibited
Setting prohibited
Digital input
Digital output
Operational amplifier 0 input
CHAPTER 4 PORT FUNCTIONS
−
Note
Note
Note
P22/ANI2/AMP0+ Pins
Note
P20/ANI0/AMP0-,
/
(
μ
P20/ANI0/
AMP0-
P21/ANI1/
AMP0OUT
PGAIN
P22/ANI2/
AMP0+
P23/ANI3
P24/ANI4
P25/ANI5
P26/ANI6
P27/ANI7
78K0/KC2-L
PD78F058x)
44 Pins
Note
Note
Note
Note
/
P20/ANI0/
AMP0-
P21/ANI1/
AMP0OUT
PGAIN
P22/ANI2/
AMP0+
P23/ANI3
P24/ANI4
P25/ANI5
P26/ANI6
P27/ANI7
48 Pins
Note
Note
Note
SS
Note
(for
141
/