UPD78F0552MA-FAA-AX Renesas Electronics America, UPD78F0552MA-FAA-AX Datasheet - Page 479

• Manufacturer Part Number: UPD78F0552MA-FAA-AX
• Description: MCU 8BIT 16-SSOP
• Manufacturer: Renesas Electronics America
• Series: 78K0/Kx2-Lr

Specifications of UPD78F0552MA-FAA-AX

• Core Processor: 78K/0
• Core Size: 8-Bit
• Speed: 10MHz
• Connectivity: I²C, LIN, UART/USART
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 9
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78K0/Kx2-L
14.4 Operation of Serial Interface UART6
14.4.1 Operation stop mode
the pins can be used as ordinary port pins in this mode. To set the operation stop mode, clear bits 7, 6, and 5 (POWER6,
TXE6, and RXE6) of ASIM6 to 0.
(1) Register used
R01UH0028EJ0400 Rev.4.00
Sep 27, 2010
Address: FF50H After reset: 01H R/W
Serial interface UART6 has the following two modes.
• Operation stop mode
• Asynchronous serial interface (UART) mode
In this mode, serial communication cannot be executed; therefore, the power consumption can be reduced. In addition,
Notes 1.
Caution Clear POWER6 to 0 after clearing TXE6 and RXE6 to 0 to stop the operation.
Remark To use the R
Symbol
ASIM6
The operation stop mode is set by asynchronous serial interface operation mode register 6 (ASIM6).
ASIM6 can be set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation sets this register to 01H.
2.
To start the communication, set POWER6 to 1, and then set TXE6 or RXE6 to 1.
and T
PORT FUNCTIONS.
The output of the T
fixed to high level when POWER6 = 0 during transmission.
Asynchronous serial interface reception error status register 6 (ASIS6), asynchronous serial interface
transmission status register 6 (ASIF6), bit 7 (SBRF6) and bit 6 (SBRT6) of asynchronous serial interface
control register 6 (ASICL6), and receive buffer register 6 (RXB6) are reset.
POWER6
POWER6
RXE6
TXE6
0
<7>
Note 1
0
0
X
D6/P13 pins of the 78K0/KB2-L, 78K0/KC2-L as general-purpose port pins, refer to CHAPTER 4
X
Disables operation of the internal operation clock (fixes the clock to low level) and asynchronously
resets the internal circuit
Disables transmission operation (synchronously resets the transmission circuit).
Disables reception (synchronously resets the reception circuit).
D6/SDAA0/P61 and T
TXE6
<6>
X
D6 pin is fixed to high level (when TXDLV6 = 0) and the input from the R
RXE6
<5>
Enables/disables operation of internal operation clock
Note 2
X
D6/SCLA0/P60 pins of the 78K0/KY2-L, 78K0/KA2-L and the R
.
PS61
4
Enables/disables transmission
Enables/disables reception
PS60
CHAPTER 14 SERIAL INTERFACE UART6
3
CL6
2
SL6
1
ISRM6
0
X
D6 pin is
X
D6/P14
465