UPD78F0552MA-FAA-AX Renesas Electronics America, UPD78F0552MA-FAA-AX Datasheet - Page 453

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UPD78F0552MA-FAA-AX

Manufacturer Part Number
UPD78F0552MA-FAA-AX
Description
MCU 8BIT 16-SSOP
Manufacturer
Renesas Electronics America
Series
78K0/Kx2-Lr
Datasheet

Specifications of UPD78F0552MA-FAA-AX

Core Processor
78K/0
Core Size
8-Bit
Speed
10MHz
Connectivity
I²C, LIN, UART/USART
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
9
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
<R>
78K0/Kx2-L
(3) Analog input channel specification register (ADS)
R01UH0028EJ0400 Rev.4.00
Sep 27, 2010
Cautions 1. Set the pin set to analog I/O to the input mode by using port mode register 2 (PM2).
Cautions 1. Set the pin set to analog I/O to the input mode by using port mode register 1 (PM1).
Cautions 1. Be sure to clear bits 4, 5, and 7 to “0”.
This register specifies the input channel of the analog voltage to be A/D converted.
ADS can be set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation clears this register to 00H.
Address: FF2FH
Symbol
ADPC1
Symbol
Address: FF0EH
2. If data is written to ADPC0, a wait cycle is generated. Do not write data to ADPC0 when the
2. If data is written to ADPC1, a wait cycle is generated. Do not write data to ADPC1 when the
2. Set a channel to be used for A/D conversion in the input mode by using port mode registers 1, 2
ADS
peripheral hardware clock is stopped. For details, refer to CHAPTER 31 CAUTIONS FOR WAIT.
peripheral hardware clock is stopped. For details, refer to CHAPTER 31 CAUTIONS FOR WAIT.
(PM1, PM2).
ADPCSn
Figure 13-6. Format of Analog Input Channel Specification Register (ADS)
ADOAS0
7
0
0
1
Figure 13-5. Format of A/D Port Configuration Register 1 (ADPC1)
7
0
0
0
0
0
0
0
0
0
0
0
0
1
After reset: 07H
After reset: 00H
Analog I/O
Digital I/O
ADOAS
ADS3
<6>
6
0
0
0
0
0
0
0
0
0
1
1
1
Other than above
R/W
(78K0/KB2-L and 78K0/KC2-L)
ADS2
0
0
0
0
1
1
1
1
0
0
0
5
0
5
0
R/W
Digital I/O or analog I/O selection (n = 8 to 10)
ADS1
0
0
1
1
0
0
1
1
0
0
1
4
0
4
0
ADS0
ADS3
<3>
0
1
0
1
0
1
0
1
0
1
0
CHAPTER 13 OPERATIONAL AMPLIFIERS
3
0
Analog input
ANI0
ANI1
ANI2
ANI3
ANI4
ANI5
ANI6
ANI7
ANI8
ANI9
ANI10
PGAOUT
Setting prohibited
channel
ADS2
<2>
ADPCS10
2
P20/ANI0 pin
P21/ANI1 pin or operational
amplifier 0 output signal
P22/ANI2 pin
P23/ANI3 pin
P24/ANI4 pin
P25/ANI5 pin
P26/ANI6 pin
P27/ANI7 pin
P10/ANI8 pin
P11/ANI9 pin or operational
amplifier 1 output signal
P12/ANI10 pin
PGA output signal
ADS1
<1>
Input source
ADPCS9
1
ADS0
<0>
ADPCS8
0
439

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