UPD78F0533AGB-GAH-AX Renesas Electronics America, UPD78F0533AGB-GAH-AX Datasheet - Page 276

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UPD78F0533AGB-GAH-AX

Manufacturer Part Number
UPD78F0533AGB-GAH-AX
Description
MCU 8BIT 64-LQFP
Manufacturer
Renesas Electronics America
Series
78K0/Kx2r
Datasheet

Specifications of UPD78F0533AGB-GAH-AX

Core Processor
78K/0
Core Size
8-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
55
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD78F0533AGB-GAH-AX
Manufacturer:
RENESAS
Quantity:
460
Part Number:
UPD78F0533AGB-GAH-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
78K0/Kx2
R01UH0008EJ0401 Rev.4.01
Jul 15, 2010
Capture
Operation
Capture operation of
CR00n
Capture operation of
CR01n
Note The capture operation of CR01n is not affected by the setting of the CRC0n1 bit.
Caution To capture the count value of the TM0n register to the CR00n register by using the phase reverse to
Remarks 1. CRC0n1: See 7.3 (2) Capture/compare control register 0n (CRC0n).
External Input
2. n = 0:
that input to the TI00n pin, the interrupt request signal (INTTM00n) is not generated after the value
has been captured. If the valid edge is detected on the TI01n pin during this operation, the capture
operation is not performed but the INTTM00n signal is generated as an external interrupt signal. To
not use the external interrupt, mask the INTTM00n signal.
Signal
ES1n1, ES1n0, ES0n1, ES0n0: See 7.3 (4) Prescaler mode register 0n (PRM0n).
n = 0, 1: 78K0/KE2 products whose flash memory is at least 48 KB, and 78K0/KF2 products
CRC0n1 = 1
TI00n pin input
(reverse phase)
Interrupt signal
TI00n pin input
Interrupt signal
78K0/KE2 products whose flash memory is less than 32 KB, and 78K0/KB2, 78K0/KC2,
78K0/KD2 products
TI00n Pin Input
Table 7-2. Capture Operation of CR00n and CR01n
Note
Set values of ES0n1 and
ES0n0
Position of edge to be
captured
01: Rising
00: Falling
11: Both edges
(cannot be captured)
INTTM00n signal is not
generated even if value
is captured.
Set values of ES0n1 and
ES0n0
Position of edge to be
captured
01: Rising
00: Falling
11: Both edges
INTTM01n signal is
generated each time
value is captured.
CHAPTER 7 16-BIT TIMER/EVENT COUNTERS 00 AND 01
CRC0n1 bit = 0
TI01n pin input
Interrupt signal
TI01n Pin Input
Set values of ES1n1 and
ES1n0
Position of edge to be
captured
01: Rising
00: Falling
11: Both edges
INTTM00n signal is
generated each time
value is captured.
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