UPD78F0533AGB-GAH-AX Renesas Electronics America, UPD78F0533AGB-GAH-AX Datasheet - Page 462

• Manufacturer Part Number: UPD78F0533AGB-GAH-AX
• Description: MCU 8BIT 64-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0/Kx2r

Specifications of UPD78F0533AGB-GAH-AX

• Core Processor: 78K/0
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 55
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78K0/Kx2
(2) Asynchronous serial interface reception error status register 6 (ASIS6)
R01UH0008EJ0401 Rev.4.01
Jul 15, 2010
Address: FF53H After reset: 00H R
Cautions 1. The operation of the PE6 bit differs depending on the set values of the PS61 and PS60 bits of
Symbol
ASIS6
This register indicates an error status on completion of reception by serial interface UART6. It includes three error
flag bits (PE6, FE6, OVE6).
This register is read-only by an 8-bit memory manipulation instruction.
Reset signal generation, or clearing bit 7 (POWER6) or bit 5 (RXE6) of ASIM6 to 0 clears this register to 00H. 00H is
read when this register is read. If a reception error occurs, read ASIS6 and then read receive buffer register 6 (RXB6)
to clear the error flag.
Figure 15-6. Format of Asynchronous Serial Interface Reception Error Status Register 6 (ASIS6)
2. For the stop bit of the receive data, only the first stop bit is checked regardless of the number of
3. If an overrun error occurs, the next receive data is not written to receive buffer register 6 (RXB6)
4. If data is read from ASIS6, a wait cycle is generated. Do not read data from ASIS6 when the
OVE6
asynchronous serial interface operation mode register 6 (ASIM6).
stop bits.
but discarded.
peripheral hardware clock (f
PE6
FE6
7
0
1
0
1
0
1
0
If POWER6 = 0 or RXE6 = 0, or if ASIS6 register is read
If the parity of transmit data does not match the parity bit on completion of reception
If POWER6 = 0 or RXE6 = 0, or if ASIS6 register is read
If the stop bit is not detected on completion of reception
If POWER6 = 0 or RXE6 = 0, or if ASIS6 register is read
If receive data is set to the RXB6 register and the next reception operation is completed before the
data is read.
6
0
5
0
PRS
) is stopped. For details, see CHAPTER 36 CAUTIONS FOR WAIT.
Status flag indicating framing error
Status flag indicating overrun error
Status flag indicating parity error
4
0
CHAPTER 15 SERIAL INTERFACE UART6
3
0
PE6
2
FE6
1
OVE6
0
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