MC9S12E256VFUE Freescale Semiconductor, MC9S12E256VFUE Datasheet - Page 93

• Manufacturer Part Number: MC9S12E256VFUE
• Description: IC MCU 256K FLASH 25MHZ 80-QFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12E256VFUE

• Core Processor: HCS12
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: EBI/EMI, I²C, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 60
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 2.35 V ~ 2.75 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 80-QFP
• Processor Series: S12E
• Core: HCS12
• Data Bus Width: 16 bit
• Data Ram Size: 16 KB
• Interface Type: I2C, SCI, SPI
• Maximum Clock Frequency: 50 MHz
• Number Of Programmable I/os: 60
• Number Of Timers: 12
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 16 Channel
• On-chip Dac: 8 bit, 2 Channel
• Package: 80PQFP
• Family Name: HCS12
• Maximum Speed: 50 MHz
• For Use With: M68EVB912E128 - BOARD EVAL FOR MC9S12E128/64
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

2.3.2.5
The banked FPROT register defines which Flash sectors are protected against program or erase operations.
All bits in the FPROT register are readable and writable with restrictions except for RNV[6] which is only
readable (see
During reset, the banked FPROT registers are loaded from the Flash Configuration Field at the address
shown in
upper sector of the Flash memory must be unprotected, then the Flash Protect/Security byte located as
described in
Trying to alter data in any of the protected areas in the Flash block will result in a protection violation error
and the PVIOL flag will be set in the FSTAT register. A mass erase of the Flash block is not possible if
any of the contained Flash sectors are protected.
Freescale Semiconductor
FPHS[1:0]
FPOPEN
FPHDIS
RNV[6]
Reset
Field
4:3
7
6
5
W
R
Table
FPOPEN
Protection Function Bit — The FPOPEN bit determines the protection function for program or erase as shown
in
0 FPHDIS and FPLDIS bits define unprotected address ranges as specified by the corresponding FPHS[1:0]
1 FPHDIS and FPLDIS bits enable protection for the address range specified by the corresponding FPHS[1:0]
Reserved Nonvolatile Bit — The RNV[6] bit must remain in the erased state 1 for future enhancements.
Flash Protection Higher Address Range Disable — The FPHDIS bit determines whether there is a
protected/unprotected area in the higher address space of the Flash block.
0 Protection/Unprotection enabled
1 Protection/Unprotection disabled
Flash Protection Higher Address Size — The FPHS[1:0] bits determine the size of the protected/unprotected
area as shown in
Table 2-1
Flash Protection Register (FPROT)
Section 2.3.2.6, “Flash Protection
F
7
Table
and FPLS[1:0] bits. For an MCU without an EEPROM module, the FPOPEN clear state allows the main part
of the Flash block to be protected while a small address range can remain unprotected for EEPROM
emulation.
and FPLS[1:0] bits.
2-10. To change the Flash protection that will be loaded during the reset sequence, the
2-12.
= Unimplemented or Reserved
must be reprogrammed.
RNV6
6
F
Table
Figure 2-8. Flash Protection Register (FPROT)
2-13. The FPHS[1:0] bits can only be written to while the FPHDIS bit is set.
Table 2-11. FPROT Field Descriptions
Table 2-10. Reset Loading of FPROT
FPHDIS
Flash Address
MC9S12E256 Data Sheet, Rev. 1.08
5
F
0xFF0D
0xFF0C
Restrictions”).
F
4
Protection Byte for
Description
FPHS
Flash Block 0
Flash Block 1
F
3
Chapter 2 256 Kbyte Flash Module (FTS256K2V1)
FPLDIS
2
F
1
F
FPLS
0
F
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