XC56309VL100A Freescale Semiconductor, XC56309VL100A Datasheet - Page 230

IC DSP 24BIT 100MHZ 196-MAPBGA

XC56309VL100A

Manufacturer Part Number
XC56309VL100A
Description
IC DSP 24BIT 100MHZ 196-MAPBGA
Manufacturer
Freescale Semiconductor
Series
DSP563xxr
Type
Fixed Pointr
Datasheets

Specifications of XC56309VL100A

Interface
Host Interface, SSI, SCI
Clock Rate
100MHz
Non-volatile Memory
ROM (576 B)
On-chip Ram
24kB
Voltage - I/o
3.30V
Voltage - Core
3.30V
Operating Temperature
-40°C ~ 100°C
Mounting Type
Surface Mount
Package / Case
196-MAPBGA
Device Core Size
24b
Format
Fixed Point
Clock Freq (max)
100MHz
Mips
100
Device Input Clock Speed
100MHz
Ram Size
102KB
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (min)
3V
Operating Supply Voltage (max)
3.6V
Operating Temp Range
-40C to 100C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
196
Package Type
MA-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
XC56309VL100A
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
XC56309VL100AR2
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Bootstrap Program
; MD:MC:MB:MA=1001
EPROMLD
_LOOP9
_LOOP11
_LOOP10
;========================================================================
FINISH
; This is the exit handler that returns execution to normal
; expanded mode and jumps to the RESET vector.
;========================================================================
; The following modes are reserved, some of which are used for internal testing
; Can be implemented in future.
;
OMR0XXX
;========================================================================
; This mode is reserved for internal testing purposes
; MD:MC:MB:MA=0111
;;---------------------------------------------------------
;;
;;
;;
;;
;;
;;
;;
;;
;;
A-8
burnin mode
Intended to be used for burn-in test. Wake up from reset
with PINIT set for execution in maximum frequency.
All RAM locations are validated, arithmetic/logic operations
are validated (add, eor) and exercised (mac).
While all tests pass, the SCK0 pin will continue to toggle.
When the test fails the DSP enters DEBUG and stops execution.
move #BOOT,r2
movep #AARV,X:M_AAR1
do #6,_LOOP9
movem p:(r2)+,a2
asr #8,a,a
move a1,r0
move a1,r1
do a0,_LOOP10
do #3,_LOOP11
movem p:(r2)+,a2
asr #8,a,a
movem a1,p:(r0)+
nop
andi #$0,ccr
jmp (r1)
jclr #2,omr,EPRSCILD
jclr #1,omr,OMR1IS0
jclr #0,omr,I8051HOSTLD ; If MD:MC:MB:MA=0110, default to 8051 Host
; r2 = address of external EPROM
; aar1 configured for SRAM types of access
; read number of words and starting address
; Get the 8 LSB from ext. P mem.
; Shift 8 bit data into A1
;
; starting address for load
; save it in r1
; a0 holds the number of words
; read program words
; Each instruction has 3 bytes
; Get the 8 LSB from ext. P mem.
; Shift 8 bit data into A1
; Go get another byte.
; Store 24-bit result in P mem.
; pipeline delay
; and go get another 24-bit word.
; Boot from EPROM done
; Clear CCR as if RESET to 0.
; Then go to starting Prog addr.
; If MD:MC:MB:MA=00xx, default to EPROM/SCI
; IF MD:MC:MB:MA=010x, default to ISA/HC11
; If MD:MC:MB:MA=0111, execute burnin test
DSP56309 User’s Manual, Rev. 1
Freescale Semiconductor

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