XC56309VL100A Freescale Semiconductor, XC56309VL100A Datasheet - Page 263

IC DSP 24BIT 100MHZ 196-MAPBGA

XC56309VL100A

Manufacturer Part Number
XC56309VL100A
Description
IC DSP 24BIT 100MHZ 196-MAPBGA
Manufacturer
Freescale Semiconductor
Series
DSP563xxr
Type
Fixed Pointr
Datasheets

Specifications of XC56309VL100A

Interface
Host Interface, SSI, SCI
Clock Rate
100MHz
Non-volatile Memory
ROM (576 B)
On-chip Ram
24kB
Voltage - I/o
3.30V
Voltage - Core
3.30V
Operating Temperature
-40°C ~ 100°C
Mounting Type
Surface Mount
Package / Case
196-MAPBGA
Device Core Size
24b
Format
Fixed Point
Clock Freq (max)
100MHz
Mips
100
Device Input Clock Speed
100MHz
Ram Size
102KB
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (min)
3V
Operating Supply Voltage (max)
3.6V
Operating Temp Range
-40C to 100C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
196
Package Type
MA-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
XC56309VL100A
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
XC56309VL100AR2
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Freescale Semiconductor
Application:
Timer Control/Status Register TCSR0:$FFFF8F Read/Write
Timers
23 22 21 20
Reset = $000000
Data Output Bit 13
0 = Zero written to TIO pin
1 = One written to TIO pin
Prescaled Clock Enable Bit 15
0 = Clock source is CLK/2 or TIO
1 = Clock source is prescaler output
Timer Compare Flag Bit 21
0 = “1” has been written to TCSR(TCF),
or timer compare interrupt serviced
1 = Timer Compare has occurred
Timer Overflow Flag Bit 20
0 = “1” has been written to TCSR(TOF),
or timer Overflow interrupt serviced
1 = Counter wraparound has occurred
*
0
Timer Reload Mode Bit 9
0 = Timer operates as a free
running counter
1 = Timer is reloaded when
selected condition occurs
Data Input Bit 12
0 = Zero read on TIO pin
1 = One read on TIO pin
Direction Bit 11
0 = TIO pin is input
1 = TIO pin is output
*
0
TCF
TOF
19 18 17 16
Figure B-20. Timer Control/Status Register (TCSR)
*
0
*
0
Inverter Bit 8
0 = 0- to-1 transitions on TIO input increment the counter,
or high pulse width measured, or high pulse output on TIO
1 = 1-to-0 transitions on TIO input increment the counter,
or low pulse width measured, or low pulse output on TIO
*
0
*
0
15 14 13 12 11 10 9
PCE
DSP56309 User’s Manual, Rev. 1
TCSR1:$FFFF8B Read/Write
TCSR2:$FFFF87 Read/Write
*
0
DO
DI
DIR
*
0
Timer Compare Interrupt Enable Bit 2
0 = Compare Interrupts Disabled
1 = Compare Interrupts Enabled
TC (3:0)
TRM INV
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
Timer Overflow Interrupt Enable Bit 1
0 = Overflow Interrupts Disabled
1 = Overflow Interrupts Enabled
8
Timer Control Bits 4–7 (TC[3–0])
Output
Output
Output
Output
Output
GPIO
TC3
Input
Input
Input
Input
TIO
7
*
TC2
Date:
Programmer:
6
= Reserved, Program as 0
External
Internal
Internal
Internal
Internal
Internal
Internal
Internal
Internal
Internal
Clock
TC1
5
TC0
4
Timer
Timer Pulse
Timer Toggle
Event Counter
Input Width
Input Period
Capture
Pulse Width Modulation
Reserved
Watchdog Pulse
Watchdog Toggle
Reserved
Reserved
Reserved
Reserved
Reserved
Timer Enable Bit 0
0 = Timer Disabled
1 = Timer Enabled
*
0
3
Mode
Programming Sheets
TCIE TQIE
Sheet 2 of 3
2
1
TE
0
B-29

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