ATA5773-PXQW Atmel, ATA5773-PXQW Datasheet - Page 51

• Manufacturer Part Number: ATA5773-PXQW
• Description: XMITTR UHF ASK/FSK 310MHZ 24VQFN
• Manufacturer: Atmel

Specifications of ATA5773-PXQW

• Frequency: 310MHz ~ 350MHz
• Modulation Or Protocol: UHF
• Power - Output: 8dBm
• Voltage - Supply: 2 V ~ 4 V
• Current - Transmitting: 9.8mA
• Data Interface: PCB, Surface Mount
• Memory Size: 4kB Flash, 256B EEPROM, 256B SRAM
• Antenna Connector: PCB, Surface Mount
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 24-VQFN Exposed Pad, 24-HVQFN, 24-SQFN, 24-DHVQFN
• Processor Series: ATA5x
• Core: AVR8
• Data Bus Width: 8 bit
• Program Memory Type: Flash
• Program Memory Size: 4 KB
• Data Ram Size: 256 B
• Interface Type: SPI, USI
• Maximum Clock Frequency: 4 MHz
• Number Of Programmable I/os: 12
• Number Of Timers: 2
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 12 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Applications: -
• Sensitivity: -
• Data Rate - Maximum: -
• Current - Receiving: -
• Lead Free Status / Rohs Status: Details

4.11.4.2
4.11.5
4.11.5.1
9137E–RKE–12/10
Register Description
Safety Level 2
MCUSR – MCU Status Register
1. In the same operation, write a logic one to WDCE and WDE. A logic one must be writ-
2. Within the next four clock cycles, in the same operation, write the WDE and WDP bits
In this mode, the Watchdog Timer is always enabled, and the WDE bit will always read as one.
A timed sequence is needed when changing the Watchdog Time-out period. To change the
Watchdog Time-out, the following procedure must be followed:
1. In the same operation, write a logical one to WDCE and WDE. Even though the WDE
2. Within the next four clock cycles, in the same operation, write the WDP bits as desired,
The MCU Status Register provides information on which reset source caused an MCU Reset.
• Bits 7..4 – Res: Reserved Bits
These bits are reserved bits in the ATtiny44V and will always read as zero.
• Bit 3 – WDRF: Watchdog Reset Flag
This bit is set if a Watchdog Reset occurs. The bit is reset by a Power-on Reset, or by writing
a logic zero to the flag.
• Bit 2 – BORF: Brown-out Reset Flag
This bit is set if a Brown-out Reset occurs. The bit is reset by a Power-on Reset, or by writing
a logic zero to the flag.
• Bit 1 – EXTRF: External Reset Flag
This bit is set if an External Reset occurs. The bit is reset by a Power-on Reset, or by writing a
logic zero to the flag.
• Bit 0 – PORF: Power-on Reset Flag
This bit is set if a Power-on Reset occurs. The bit is reset only by writing a logic zero to the
flag.
To make use of the Reset Flags to identify a reset condition, the user should read and then
reset the MCUSR as early as possible in the program. If the register is cleared before another
reset occurs, the source of the reset can be found by examining the Reset Flags.
Bit
0x34 (0x54)
Read/Write
Initial Value
ten to WDE regardless of the previous value of the WDE bit.
as desired, but with the WDCE bit cleared.
always is set, the WDE must be written to one to start the timed sequence.
but with the WDCE bit cleared. The value written to the WDE bit is irrelevant.
R
7
–
0
R
6
–
0
R
5
–
0
R
4
–
0
WDRF
R/W
Atmel ATA5771/73/74
3
BORF
See Bit Description
R/W
2
EXTRF
R/W
1
PORF
R/W
0
MCUSR
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