A3P125-FGG144 Actel, A3P125-FGG144 Datasheet - Page 39

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A3P125-FGG144

Manufacturer Part Number
A3P125-FGG144
Description
FPGA - Field Programmable Gate Array 125K System Gates
Manufacturer
Actel
Datasheet

Specifications of A3P125-FGG144

Processor Series
A3P125
Core
IP Core
Maximum Operating Frequency
350 MHz
Number Of Programmable I/os
133
Data Ram Size
36864
Delay Time
11.1 ns
Supply Voltage (max)
1.575 V
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Development Tools By Supplier
A3PE-Proto-Kit, A3PE-Brd1500-Skt, Silicon-Explorer II, Silicon-Sculptor 3, SI-EX-TCA, FlashPro 4, FlashPro 3, FlashPro Lite
Mounting Style
SMD/SMT
Supply Voltage (min)
1.425 V
Number Of Gates
125 K
Package / Case
FPBGA-144
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Table 2-26 • Summary of I/O Timing Characteristics—Software Default Settings
I/O Standard
3.3 V LVTTL /
3.3 V LVCMOS
3.3 V LVCMOS
Wide Range
2.5 V LVCMOS
1.8 V LVCMOS
1.5 V LVCMOS
Notes:
1. Please note that 3.3 V LVCMOS wide range is applicable to 100 µA drive strength only. The configuration will NOT
2. All LVCMOS 3.3 V software macros support LVCMOS 3.3 V wide range as specified in the JESD-8B specification.
3. For specific junction temperature and voltage supply levels, refer to
operate at the equivalent software default drive strength. These values are for Normal Ranges ONLY.
–2 Speed Grade, Commercial-Case Conditions: T
Worst-Case V
Standard I/O Banks
2
100 µA 8 mA
8 mA
8 mA
4 mA
2 mA
8 mA
8 mA
4 mA
2 mA
CCI
(per standard)
High
High
High
High
High
35
35
35
35
35
0.45 3.29 0.03 0.75 0.32 3.36 2.80 1.79 2.01
0.45 5.09 0.03 1.13 0.32 5.09 4.25 2.77 3.11 4.36
0.45 3.56 0.03 0.96 0.32 3.40 3.56 1.78 1.91
0.45 4.74 0.03 0.90 0.32 4.02 4.74 1.80 1.85
0.45 5.71 0.03 1.06 0.32 4.71 5.71 1.83 1.83
R e v i s i o n 9
J
= 70°C, Worst Case VCC = 1.425 V,
Table 2-6 on page 2-6
for derating values.
ProASIC3 Flash Family FPGAs
ns
ns
ns
ns
2- 25

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