LFE2M20E-5FN256C Lattice, LFE2M20E-5FN256C Datasheet - Page 101

FPGA - Field Programmable Gate Array 19K LUTs 140 I/O SERDES DSP -5

LFE2M20E-5FN256C

Manufacturer Part Number
LFE2M20E-5FN256C
Description
FPGA - Field Programmable Gate Array 19K LUTs 140 I/O SERDES DSP -5
Manufacturer
Lattice
Datasheet

Specifications of LFE2M20E-5FN256C

Number Of Macrocells
19000
Maximum Operating Frequency
311 MHz
Number Of Programmable I/os
140
Data Ram Size
1246208
Supply Voltage (max)
1.26 V
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Supply Voltage (min)
1.14 V
Package / Case
FPBGA-256
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LFE2M20E-5FN256C
Manufacturer:
Lattice Semiconductor Corporation
Quantity:
10 000
Lattice Semiconductor
Figure 3-18. Configuration from PROGRAMN Timing
Figure 3-19. Wake-Up Timing
Figure 3-20. SPI/SPIm Configuration Waveforms
PROGRAMN
CSSPI[0:1]N
SISPI/BUSY
D7/SPID0
DONE
CCLK
INITN
VCC
DPPDONE
t
PROGRAMN
PROGRAMN
DPPINIT
USER I/O
USER I/O
t
CFG[2:0]
1. The CFG pins are normally static (hard wired)
PRGM
t
ICFG
DONE
DONE
INITN
CCLK
INITN
CCLK
t
DINIT
t
Capture
DPPINIT
t
t
CFGx
DINITD
CFGX
t
CSSPI
Wake-Up
t
CSCCLK
OPCODE
Capture
t
SOE
t
CSPID
t
IOENSS
t
IODISS
D7
0
t
SOCDO
1
D6
t
PRGM
2
D5 D4 D3 D2 D1 D0
3-49
3
4
5
t
MWC
6
t
DINIT
7
DC and Switching Characteristics
LatticeECP2/M Family Data Sheet
Clock 127
t
XXX
SUCFG
0
Clock 128
Valid
Valid Bitstream
t
HCFG

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