LPC2220FBD144 NXP Semiconductors, LPC2220FBD144 Datasheet - Page 24

• Manufacturer Part Number: LPC2220FBD144
• Description: IC, 16/32BIT ARM7 MCU, 64K RAM, SMD
• Manufacturer: NXP Semiconductors

Specifications of LPC2220FBD144

• No. Of I/o's: 76
• Ram Memory Size: 64KB
• Cpu Speed: 75MHz
• No. Of Timers: 2
• No. Of Pwm Channels: 6
• Digital Ic Case Style: LQFP
• Supply Voltage: RoHS Compliant
• Core Size: 32bit
• Oscillator Type: External Only
• Controller Family/series: LPC22xx
• Peripherals: ADC, RTC
• Rohs Compliant: Yes

NXP Semiconductors
LPC2210_2220_6
Product data sheet
6.11.2 ADC features available in LPC2210/01 and LPC2220 only
6.12.1 Features
6.12.2 UART features available in LPC2210/01 and LPC2220 only
6.13.1 Features
6.12 UARTs
6.13 I
The LPC2210/2220 each contain two UARTs. One UART provides a full modem control
handshake interface, the other provides only transmit and receive data lines.
Compared to previous LPC2000 microcontrollers, UARTs in LPC2210/01 and LPC2220
introduce a fractional baud rate generator for both UARTs, enabling these microcontrollers
to achieve standard baud rates such as 115200 Bd with any crystal frequency above
2 MHz. In addition, auto-CTS/RTS flow-control functions are fully implemented in
hardware.
The I
(SCL), and a serial data line (SDA). Each device is recognized by a unique address and
can operate as either a receiver-only device (e.g., an LCD driver or a transmitter with the
capability to both receive and send information (such as memory). Transmitters and/or
receivers can operate in either master or slave mode, depending on whether the chip has
to initiate a data transfer or is only addressed. The I
can be controlled by more than one bus master connected to it.
The I
I
2
2
•
•
•
•
•
•
•
•
•
•
•
•
C-bus).
•
•
C-bus serial I/O controller
Optional conversion on transition on input pin or Timer Match signal.
Every analog input has a dedicated result register to reduce interrupt overhead.
Every analog input can generate an interrupt once the conversion is completed.
The ADC pads are 5 V tolerant when configured for digital I/O function(s).
16 B receive and transmit FIFOs.
Register locations conform to 16C550 industry standard.
Receiver FIFO trigger points at 1 B, 4 B, 8 B, and 14 B.
Built-in baud rate generator.
Standard modem interface signals included on UART1.
Fractional baud rate generator enables standard baud rates such as 115200 Bd to be
achieved with any crystal frequency above 2 MHz.
Auto-bauding.
Auto-CTS/RTS flow-control fully implemented in hardware.
Compliant with standard I
Easy to configure as master, slave, or master/slave.
2
2
C-bus is bidirectional for inter-IC control using only two wires: a serial clock line
C-bus implemented in LPC2210/2220 supports a bit rate up to 400 kbit/s (fast
Rev. 06 — 11 December 2008
2
C-bus interface.
2
C-bus is a multi-master bus, and it
16/32-bit ARM microcontrollers
LPC2210/2220
© NXP B.V. 2008. All rights reserved.
24 of 50