PIC24FJ256GB106-I/MR Microchip Technology, PIC24FJ256GB106-I/MR Datasheet - Page 31

IC, 16BIT MCU, PIC24F, 32MHZ, QFN-64

PIC24FJ256GB106-I/MR

Manufacturer Part Number
PIC24FJ256GB106-I/MR
Description
IC, 16BIT MCU, PIC24F, 32MHZ, QFN-64
Manufacturer
Microchip Technology
Series
PIC® 24Fr

Specifications of PIC24FJ256GB106-I/MR

Controller Family/series
PIC24
No. Of I/o's
51
Ram Memory Size
16KB
Cpu Speed
32MHz
No. Of Timers
5
Core Size
16 Bit
Program Memory Size
256KB
Peripherals
ADC, Comparator, PWM, RTC, Timer
Core Processor
PIC
Speed
32MHz
Connectivity
I²C, SPI, UART/USART, USB OTG
Number Of I /o
51
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-VFQFN, Exposed Pad
Processor Series
PIC24FJ
Core
PIC
Data Bus Width
16 bit
Data Ram Size
16 KB
Interface Type
I2C, SPI, UART
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
52
Number Of Timers
5
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM240001, DM240011
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 16 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
876-1004 - PIC24 BREAKOUT BOARD
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC24FJ256GB106-I/MR
Manufacturer:
TI
Quantity:
1 292
TABLE 4-2:
© 2007 Microchip Technology Inc.
WINDIS
WPCFG
WPDIS
WPEND
WPFP8:WPFP0
Note 1:
Bit Field
2:
Available on PIC24FJXXXGB1XX devices only.
Available on PIC24FJXXXGA110 devices only. On other devices, always maintain this bit as ‘1’.
PIC24FJXXXGA1/GB1 CONFIGURATION BITS DESCRIPTION (CONTINUED)
CW3<8:0>
CW3<14>
CW3<13>
CW3<15>
Register
CW1<6>
Windowed WDT bit
1 = Watchdog Timer in Non-Window mode
0 = Watchdog Timer in Window mode; FWDTEN must be ‘1’
Configuration Word Code Page Protection Select bit
1 = Last page (at the top of program memory) and Flash Configuration Words
0 = Last page and Flash Configuration Words are code-protected
Segment Write Protection Disable bit
1 = Segmented code protection disabled
0 = Segmented code protection enabled; protected segment defined by
Segment Write Protection End Page Select bit
1 = Protected code segment lower boundary is at the bottom of program
0 = Protected code segment upper boundary is at the last page of program
Protected Code Segment Boundary Page bits
Designates the 16K word program code page that is the boundary of the
protected code segment, starting with Page 0 at the bottom of program
memory
If WPEND = 1:
Last address of designated code page is the upper boundary of the segment
If WPEND = 0:
First address of designated code page is the lower boundary of the segment
are not protected
WPEND, WPCFG and WPFPx Configuration bits
memory (000000h); upper boundary is the code page specified by
WPFP8:WPFP0
memory; lower boundary is the code page specified by WPFP8:WPFP0
PIC24FJXXXGA1/GB1
Description
DS39907A-page 31

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