PIC24FJ256GB106-I/MR Microchip Technology, PIC24FJ256GB106-I/MR Datasheet - Page 32

IC, 16BIT MCU, PIC24F, 32MHZ, QFN-64

PIC24FJ256GB106-I/MR

Manufacturer Part Number
PIC24FJ256GB106-I/MR
Description
IC, 16BIT MCU, PIC24F, 32MHZ, QFN-64
Manufacturer
Microchip Technology
Series
PIC® 24Fr

Specifications of PIC24FJ256GB106-I/MR

Controller Family/series
PIC24
No. Of I/o's
51
Ram Memory Size
16KB
Cpu Speed
32MHz
No. Of Timers
5
Core Size
16 Bit
Program Memory Size
256KB
Peripherals
ADC, Comparator, PWM, RTC, Timer
Core Processor
PIC
Speed
32MHz
Connectivity
I²C, SPI, UART/USART, USB OTG
Number Of I /o
51
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-VFQFN, Exposed Pad
Processor Series
PIC24FJ
Core
PIC
Data Bus Width
16 bit
Data Ram Size
16 KB
Interface Type
I2C, SPI, UART
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
52
Number Of Timers
5
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM240001, DM240011
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 16 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
876-1004 - PIC24 BREAKOUT BOARD
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC24FJ256GB106-I/MR
Manufacturer:
TI
Quantity:
1 292
PIC24FJXXXGA1/GB1
4.6.2
Configuration bits may be programmed a single byte at
a time using the PROGP command. This command
specifies the configuration data and Configuration
register
programmed, any unimplemented or reserved bits
must be programmed with a ‘1’.
Two PROGP commands are required to program the
Configuration bits. A flowchart for Configuration bit
programming is shown in Figure 4-5.
FIGURE 4-5:
DS39907A-page 32
Note:
Note 1: Refer to Table 2-2 for Flash Configuration Word addresses.
address.
PROGRAMMING METHODOLOGY
If the General Segment Code-Protect bit
(GCP) is programmed to ‘0’, code memory
is code-protected and can not be read.
Code memory must be verified before
enabling read protection. See Section 4.6.4
“Code-Protect Configuration Bits” for
more
Configuration bits.
information
When
ConfigAddress + 2
ConfigAddress =
CONFIGURATION BIT PROGRAMMING FLOW
Configuration
about
code-protect
bits
No
are
PROGP response
ConfigAddress
Send PROGP
0XXXFEh?
Command
PASS?
Finish
Start
4.6.3
After the Configuration bits are programmed, the
contents of memory should be verified to ensure that
the programming was successful. Verification requires
the Configuration bits to be read back and compared
against the copy held in the programmer’s buffer. The
READP command reads back the programmed
Configuration bits and verifies that the programming
was successful.
Is
Is
Yes
Yes
(1)
ConfigAddress = 0XXXFAh
PROGRAMMING VERIFICATION
No
Report Error
© 2007 Microchip Technology Inc.
Failure
(1)

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