SW00ENB-ZCC Toshiba, SW00ENB-ZCC Datasheet - Page 268

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SW00ENB-ZCC

Manufacturer Part Number
SW00ENB-ZCC
Description
MCU, MPU & DSP Development Tools CASEWORKS
Manufacturer
Toshiba
Datasheet

Specifications of SW00ENB-ZCC

Tool Type
Development Software Support
Core Architecture
870
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
SIOS Bit
SIOF Bit
SEF Bit
SCK Output
SO Pin
SI Pin
IINTS2 Interrupt
Request
SBI0DBR
(a) Write of the transmit data
SBI0CR1
SBI0DBR
SBI0CR1
INTS2 interrupt
Reg.
SBI0DBR
Figure 14.28 Retention Time of the Transmit Data in Receive/Transmit Mode
Figure 14.27 Receive/Transmit Mode (Internal Clock Mode)
SCK Pin
SIOF Bit
SO Pin
*
a
SBI0DBR
7 6 5 4 3 2 1 0
0 1 1 0 0 X X X
X X X X X X X X
1 0 1 0 0 X X X
X X X X X X X X
c
a
0
0
bit 6
c
a
1
1
c
TMP1940CYAF-226
a
2
2
c
a
3
Bit 7 of the last byte transmitted
3
c
a
4
4
(c) Read of the
c
a
received data
5
5
Select receive/transmit mode.
Write the transmit data.
Start reception/transmission.
Read the received data.
Write the transmit data.
c
a
6
6
t
SODH
c
a
7
7
c
4/fsys/2 seconds (min.)
(b) Write of the
transmit data
b
d
0
0
b
b
d
1
1
The SIOS bit is cleared.
b
d
TMP1940CYAF
2
2
b
d
3
3
b
d
4
4
b
d
5
5
b
d
(d) Read of the
received data
6
6
b
d
7
7
d

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