SW00ENB-ZCC Toshiba, SW00ENB-ZCC Datasheet - Page 413

• Manufacturer Part Number: SW00ENB-ZCC
• Description: MCU, MPU & DSP Development Tools CASEWORKS
• Manufacturer: Toshiba

Specifications of SW00ENB-ZCC

• Tool Type: Development Software Support
• Core Architecture: 870
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

3.6.10
automatically erases and verifies the entire memory for an all-1 data pattern. The system can determine
the status of the chip erase operation by using write status flags (see Table 3.19 on page 62).
terminates the chip erase operation. The chip erase operation that was interrupted should be re-initiated
once the flash memory is ready to accept another command sequence because data may be corrupted.
erases the unprotected blocks and ignores the protected blocks. If all the blocks are protected, the Auto
Chip Erase command does nothing; the flash memory returns to Read mode in approximately 100 m
after the completion of the sixth bus cycle of the command sequence.
Operation mode. The system can determine this status by using write status flags. To put the flash
memory back in Read mode, use the Read/Reset command to reset the flash memory or a hardware reset
to reset the whole chip. In case of an erase failure, it is recommended to replace the chip or discontinue
the use of the failing flash block. The failing block can be identified by means of the Block Erase
command.
Auto Block Erase and Auto Multi-Block Erase Commands
the command sequence. After a time-out, the erase operation will commence. The embedded Auto
Block Erase algorithm automatically preprograms the selected block for an all-0 data pattern, and then
erases and verifies that block for an all-1 data pattern.
written. For more on this, see Figure 3.20.
Read mode. The block erase time-out period is 50 m. The system may read DQ3 to determine whether
the time-out period has expired. The block erase timer begins counting upon completion of the sixth bus
cycle of the Auto Block Erase command sequence. The system can determine the status of the erase
operation by using write status flags (see Table 3.19 on page 62).
terminates the block erase operation. The block erase operation that was interrupted should be re-
initiated once the flash memory is ready to accept another command sequence because data may be
corrupted.
erases the unprotected blocks and ignores the protected blocks. If all the selected blocks are protected,
the Auto Block Erase algorithm does nothing; the flash memory returns to Read mode in approximately
100 m after the final bus cycle of the command sequence. When the embedded Auto Block Erase
algorithm is complete, the flash memory returns to Read mode.
Operation mode. The system can determine this status by using write status flags. To put the flash
memory back in Read mode, use the Read/Reset command to reset the flash memory or a hardware reset
to reset the whole chip. In case of an erase failure, it is recommended to replace the chip or discontinue
the use of the failing flash block. If any failure occurred during the multi-block erase operation, the
failing block can be identified by running Auto Block Erase on each of the blocks selected for multi-
block erasure.
When the embedded Auto Chip Erase algorithm is complete, the flash memory returns to Read mode.
If any failure occurs during the erase operation, the flash memory remains locked in Embedded
Any commands written during the chip erase operation are ignored. A hardware reset immediately
The block protection feature disables erase operations in any block. The Auto Chip Erase algorithm
The Auto Block Erase command requires six bus cycles. A time-out begins from the completion of
During the time-out period, additional block addresses and Auto Block Erase commands may be
Any command other than Auto Block Erase during the time-out period resets the flash memory to
Any commands written during the block erase operation are ignored. A hardware reset immediately
The block protection feature disables erase operations in any block. The Auto Block Erase algorithm
If any failure occurs during the erase operation, the flash memory remains locked in Embedded
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