EP3C16F256I7N Altera, EP3C16F256I7N Datasheet - Page 201

• Manufacturer Part Number: EP3C16F256I7N
• Description: Cyclone III
• Manufacturer: Altera

Figure 8–9. RSDS Interface with External Resistor Network on the Top and Bottom I/O Banks
Note to
(1)
Altera Corporation-Preliminary
March 2007
The
Figure
R
S
and
Cyclone III Device
RSDS Transmitter
8–9:
Non-Dedicated
R
P
f
values are pending device characterization.
For more information on the RSDS I/O standard, refer to the RSDS
specification from the National Semiconductor web site
(www.national.com).
A resistor network is required to attenuate the output voltage swing to
meet RSDS specifications when using non-dedicated RSDS transmitters.
You can modify the resistor network values to reduce power or improve
the noise margin. The resistor values chosen should satisfy the following
equation:
You should perform additional simulations using the IBIS models to
validate that custom resistor values meet the RSDS requirements.
Instead of using three resistors in the resistor network, it is possible to use
a single external resistor. The external single-resistor solution reduces the
external resistor count while still achieving the required signaling level
for RSDS. However, the performance of the single-resistor solution is
lower than the performance with the resistor network. The performance
target for a single-resistor solution is pending device characterization. To
transmit the RSDS signal, an external resistor (Rp) is connected in parallel
between the two adjacent I/O pins on the board, as shown in
R S ×
R S
+
R P
Resistor Network
R P
2
2
=
R S
R S
50 Ω
R P
50 Ω
50 Ω
Cyclone III Device Handbook, Volume 1
100 Ω
High-Speed I/O Standards Support
RSDS Receiver
Figure
8–10.
8–11