EP3C16F256I7N Altera, EP3C16F256I7N Datasheet - Page 512

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EP3C16F256I7N

Manufacturer Part Number
EP3C16F256I7N
Description
Cyclone III
Manufacturer
Altera
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Typical Design Performance
1–102
Cyclone III Handbook
2.5-V LVTTL/LVCMOS
1.8-V LVTTL/LVCMOS
1.5-V LVTTL/LVCMOS
1.2-V LVTTL/LVCMOS
SSTL-2 Class I
SSTL-2 Class II
SSTL-18 Class I
Table 1–67. EP3C40 Row I/O Pin Input Timing Parameters for Single-Ended I/O Standards (Part 2 of 4)
I/O Standard
GCLK
GCLK PLL
GCLK
GCLK PLL
GCLK
GCLK PLL
GCLK
GCLK PLL
GCLK
GCLK PLL
GCLK
GCLK PLL
GCLK
GCLK PLL
Clock
Parameter
t
t
t
t
t
t
t
t
t
t
t
t
t
t
SU
t
SU
t
SU
t
SU
t
SU
t
SU
t
SU
t
SU
t
SU
t
SU
t
SU
t
SU
t
SU
t
SU
t
H
H
H
H
H
H
H
H
H
H
H
H
H
H
-0.730
-3.671
-0.656
-3.597
-0.736
-3.677
-0.905
-3.846
-0.680
-3.621
-0.680
-3.621
-0.742
-3.683
0.930
3.871
0.856
3.797
0.936
3.877
1.105
4.046
0.880
3.821
0.880
3.821
0.942
3.883
-6
Specification
-0.731
-3.970
-0.687
-3.926
-0.792
-4.031
-0.987
-4.226
-0.708
-3.947
-0.708
-3.947
-0.797
-4.036
0.962
4.201
0.918
4.157
1.023
4.262
1.218
4.457
0.939
4.178
0.939
4.178
1.028
4.267
-7
Altera Corporation- Preliminary
-0.713
-4.258
-0.698
-4.243
-0.829
-4.374
-1.052
-4.597
-0.716
-4.261
-0.716
-4.261
-0.833
-4.378
0.976
4.521
0.961
4.506
1.092
4.637
1.315
4.860
0.979
4.524
0.979
4.524
1.096
4.641
-8
March 2007
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