WM8976GEFL/V Wolfson Microelectronics, WM8976GEFL/V Datasheet - Page 64

• Manufacturer Part Number: WM8976GEFL/V
• Description: Audio CODECs Mono ADC Stereo DAC with Spkr
• Manufacturer: Wolfson Microelectronics

Specifications of WM8976GEFL/V

• Mounting Style: SMD/SMT
• Package / Case: QFN-32
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

WM8976
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ENABLING THE OUTPUTS
Table 50 Output Stages Power Management Control
THERMAL SHUTDOWN
Table 51 Thermal Shutdown
UNUSED ANALOGUE INPUTS/OUTPUTS
Table 52 Disabled Outputs to VREF Resistance
Each analogue output of the WM8976 can be separately enabled or disabled. The analogue mixer
associated with each output has a separate enable. All outputs are disabled by default. To save
power, unused parts of the WM8976 should remain disabled.
Outputs can be enabled at any time, but it is not recommended to do so when BUFIO is disabled
(BUFIOEN=0) or when BUFDCOP is disabled (BUFDCOPEN=0) when configured in output boost
mode, as this may cause pop noise (see “Power Management” and “Applications Information”
sections).
The speaker outputs can drive very large currents. To protect the WM8976 from overheating a
thermal shutdown circuit is included. If the device temperature reaches approximately 125
thermal shutdown circuit is enabled (TSDEN=1) then the speaker amplifiers will be disabled if
TSDEN is set. The thermal shutdown may also be configured to generate an interrupt. See the GPIO
and Interrupt Controller section for details.
Whenever an analogue input/output is disabled, it remains connected to a voltage source (either
AVDD/2 or 1.5xAVDD/2 as appropriate) through a resistor. This helps to prevent pop noise when the
output is re-enabled. The resistance between the voltage buffer and the output pins can be controlled
using the VROI control bit. The default impedance is low, so that any capacitors on the outputs can
charge up quickly at start-up. If a high impedance is desired for disabled outputs, VROI can then be
set to 1, increasing the resistance to about 30kΩ.
R1
Power
Management
1
R2
Power
Management
2
R3
Power
Management
3
Note: All “Enable” bits are 1 = ON, 0 = OFF
R49
Output
control
R49
REGISTER
REGISTER
ADDRESS
REGISTER
ADDRESS
ADDRESS
1
2
6
7
8
8
7
6
2
3
5
6
7
8
BIT
0
BIT
BIT
TSDEN
ROUT1EN
ROUT2EN
BUFIOEN
OUT3MIXEN
OUT4MIXEN
BUFDCOPEN
LOUT1EN
SLEEP
LMIXEN
RMIXEN
LOUT2EN
OUT3EN
OUT4EN
VROI
LABEL
LABEL
LABEL
1
DEFAULT
0
DEFAULT
0
0
0
0
0
0
0
0
0
0
0
0
0
DEFAULT
Thermal Shutdown Enable
0 : thermal shutdown disabled
1 : thermal shutdown enabled
Unused input/output tie off buffer enable
OUT3 mixer enable
OUT4 mixer enable
Output stage 1.5xAVDD/2 driver enable
ROUT1 output enable
LOUT1 output enable
0 = normal device operation
1 = residual current reduced in device
standby mode if clocks still running
Left mixer enable
Right mixer enable
ROUT2 output enable
LOUT2 output enable
OUT3 enable
OUT4 enable
VREF (AVDD/2 or 1.5xAVDD/2) to
analogue output resistance
0: approx 1kΩ
1: approx 30 kΩ
DESCRIPTION
DESCRIPTION
DESCRIPTION
PD Rev 4.4 July 2009
Production Data
0
C and the
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