WM9713LGEFL/RV Wolfson Microelectronics, WM9713LGEFL/RV Datasheet - Page 55

• Manufacturer Part Number: WM9713LGEFL/RV
• Description: Audio CODECs Stereo AC'97 CODEC T/P Interface
• Manufacturer: Wolfson Microelectronics

Specifications of WM9713LGEFL/RV

• Number Of Adc Inputs: 1
• Number Of Dac Outputs: 1
• Conversion Rate: 8 KSPs
• Interface Type: AC97
• Resolution: 12 bit
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: QFN-48
• Minimum Operating Temperature: - 25 C
• Number Of Channels: 1 ADC, 1 DAC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Pre-Production
ANALOGUE AUDIO OUTPUTS
HEADPHONE OUTPUTS – HPL AND HPR
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The following sections give an overview of the analogue audio output pins. The WM9713L has three
outputs capable of driving loads down to 16Ω (headphone / line drivers) – HPL, HPR and MONO -
and four outputs capable of driving loads down to 8Ω (loudspeaker / line drivers) – SPKL, SPKR,
OUT3 and OUT4. The combination of output drivers, mixers and mixer inverters means that many
output configurations can be supported.
For examples of typical output and mixer configurations please refer to the “Typical Output
Configurations” section. For more information on recommended external components, please refer to
the “Applications Information” section.
Each output is driven by a PGA with a gain range of 0dB to -46.5dB in -1.5dB steps. Each PGA has
an input source mux, mute and zero-cross detect circuit (delaying gain changes until a zero-cross is
detected, or after time-out).
The HPL and HPR outputs (pins 39 and 41) are designed to drive a 16Ω or 32Ω headphone load.
They can also be used as line outputs. They can be used in and AC coupled or DC coupled (capless)
configuration. The available input sources are HPMIXL/R and Vmid (see Table 32).
Table 32 HPL / HPR PGA Input Source
The signal volume on HPL and HPR can be independently adjusted under software control by writing
to register 04h.
When not in use HPL and HPR can be powered down using the Powerdown register bits HPL and
HPR (register 3Eh, bits [10:9]). To minimise pops and clicks when the PGA is powered down / up it is
recommended that the Vmid input is selected during the power down / up cycle. This ensures the
same DC level is maintained on the output pin throughout.
1Ch
Output PGA
Mux Select
REGISTER
ADDRESS
7:6
5:4
BIT
HPL
HPR
LABEL
00 (Vmid)
00 (Vmid)
DEFAULT
HPL Source Control
00 = VMID
01 = No input (tri-stated if HPL is
disabled in 3Eh)
10 = HPMIXL
11 = Reserved
HPR Source Control
00 = VMID
01 = No input (tri-stated if HPR is
disabled in 3Eh)
10 = HPMIXR
11 = Reserved
DESCRIPTION
PP Rev 3.2 September 2008
WM9713L
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