DS33Z11 Maxim Integrated Products, DS33Z11 Datasheet - Page 75

• Manufacturer Part Number: DS33Z11
• Description: Network Controller & Processor ICs Ethernet Mapper Ethe rnet-Serial TDM Ethe
• Manufacturer: Maxim Integrated Products

Specifications of DS33Z11

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit 2: REF_CLKO OFF (REF_CLKO) This bit determines if the REF_CLKO is turned off
Bit 1: INT pin mode (INTM) This bit determines the inactive mode of the INT pin. The INT pin always drives low
when active.
Bit 0: Reset (RST). When this bit is set to 1, all of the internal data path and status and control registers (except
this RST bit), on all ports, are reset to their default state. This bit must be set high for a minimum of 100ns.
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit 0: BERT Connect 1 (BLC1) If this bit is set to 1, the BERT is connected to Serial Interface 1. The BERT
transmitter is connected to the transmit serial port and receive to receive serial port. When the BERT is
connected, normal data transfer is interrupted. Note that connecting the BERT overrides a connection to the
Serial Interface, if a connection exists. When the BERT is disconnected, the connection is restored. The BERT is
unavailable in Hardware Mode.
1 = REF_CLKO is disabled and outputs an active low signal.
0 = REF_CLKO is active and in accordance with RMII/MII Selection
1 = Pin is high impedance when not active
0 = Pin drives high when not active
0 = Normal operation
1 = Reset and force all internal registers to their default values
7
-
7
0
-
6
-
6
0
-
GL.CR1
Global Control Register 1
02h
GL.BLR
Global BERT Connect Register
03h
5
-
5
0
-
75 of 172
4
-
4
0
-
3
-
3
0
-
REF_CLKO
2
0
2
0
-
INTM
1
0
1
0
-
BLC1
RST
0
0
0
0