DS33Z11 Maxim Integrated Products, DS33Z11 Datasheet - Page 79

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DS33Z11

Manufacturer Part Number
DS33Z11
Description
Network Controller & Processor ICs Ethernet Mapper Ethe rnet-Serial TDM Ethe
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of DS33Z11

Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Bit 0: BERT Interrupt Status (BIS) This bit is set to 1 if the BERT has an enabled interrupt generating event.
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit 0: LINE1[0] This bit is preserved to provide software compatibility with multiport devices. The LINE1[0] bit
selects the Ethernet port that is to be connected to the Serial Interface. Note that Bi-directional connection is
assumed between the Serial and Ethernet Interfaces. The connection register and corresponding queue size
must be defined for proper operation. Writing a 0 to this register will disconnect the connection. When a
connection is disconnected, “1”s are sourced to the Serial Interface transmit and to the HDLC receiver and the
clocks to the HDLC transmitter/receiver are disabled.
Bit #
Name
Default
Register Name:
Register Description:
Register Address:
7
0
-
7
0
-
6
0
-
6
0
-
GL.CON1
Connection Register for Ethernet Interface 1
0Eh
GL.BIS
Global BERT Interrupt Status
0Dh
5
0
-
5
0
-
79 of 172
4
0
-
4
0
-
3
0
-
3
0
-
2
0
-
2
0
-
1
0
-
1
0
-
LINE1[0]
BIS
0
1
0
0

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