82V2081PPG8 IDT, Integrated Device Technology Inc, 82V2081PPG8 Datasheet
82V2081PPG8
Specifications of 82V2081PPG8
Related parts for 82V2081PPG8
82V2081PPG8 Summary of contents
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FEATURES: • Single channel T1/E1/J1 long haul/short haul line interfaces • Supports HPS (Hitless Protection Switching) for 1+1 protection without external relays • Receiver sensitivity exceeds -36 dB@772KHz and -43 dB@1024 KHz • Programmable T1/E1/J1 switchability allowing one bill of ...
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SINGLE CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT FUNCTIONAL BLOCK DIAGRAM LOS/AIS LOS Detector RCLK B8ZS/ RD/RDP HDB3/AMI CV/RDN Decoder PRBS Detector Remote Loopback IBLC Detector TCLK B8ZS/ TD/TDP HDB3/AMI TDN Decoder PRBS Generator IBLC Generator TAOS Clock Software ...
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SINGLE CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT TABLE OF CONTENTS TABLE OF CONTENTS 1 IDT82V2081 PIN CONFIGURATIONS .......................................................................................... 8 2 PIN DESCRIPTION ....................................................................................................................... 9 3 FUNCTIONAL DESCRIPTION .................................................................................................... 15 3.1 CONTROL MODE SELECTION ....................................................................................... 15 3.2 T1/E1/J1 MODE ...
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SINGLE CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT 3.9 ERROR DETECTION/COUNTING AND INSERTION ...................................................... 29 3.9.1 DEFINITION OF LINE CODING ERROR ............................................................... 29 3.9.2 ERROR DETECTION AND COUNTING ................................................................ 29 3.9.3 BIPOLAR VIOLATION AND PRBS ERROR INSERTION ...................................... 30 ...
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SINGLE CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT LIST OF TABLES Table-1 Pin Description ................................................................................................................ 9 Transmit Waveform Value For E1 75 Ω ........................................................................ 17 Table-2 Transmit Waveform Value For E1 120 Ω ...................................................................... 17 Table-3 Table-4 Transmit Waveform ...
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SINGLE CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT Table-47 STAT0: Line Status Register 0 (real time status monitor)............................................. 46 Table-48 STAT1: Line Status Register 1 (real time status monitor)............................................. 47 Table-49 INTS0: Interrupt Status Register 0 ................................................................................ 48 Table-50 ...
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SINGLE CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT LIST OF FIGURES Figure-1 Block Diagram ................................................................................................................. 2 Figure-2 IDT82V2081 TQFP44 Package Pin Assignment ............................................................ 8 Figure-3 E1 Waveform Template Diagram .................................................................................. 15 Figure-4 E1 Pulse Template Test Circuit ..................................................................................... 16 ...
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SINGLE CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT 1 IDT82V2081 PIN CONFIGURATIONS IC 34 VDDT 35 TRING 36 TTIP 37 GNDT 38 GNDA 39 RRING 40 RTIP 41 VDDA 42 REF Figure-2 IDT82V2081 TQFP44 Package Pin ...
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SINGLE CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT 2 PIN DESCRIPTION Table-1 Pin Description Name Type Pin No. TTIP Analog 37 TTIP/TRING: Transmit Bipolar Tip/Ring TRING output 36 These pins are the differential line driver outputs. They will be ...
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SINGLE CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT Table-1 Pin Description (Continued) Name Type Pin No. MCLK I 9 MCLK: Master Clock input A built-in clock system that accepts selectable 2.048MHz reference for E1 operating mode and 1.544MHz reference ...
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SINGLE CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT Table-1 Pin Description (Continued) Name Type Pin No. INT O 20 INT: Interrupt Request In software control mode, this pin outputs the general interrupt request for all interrupt sources. These interrupt ...
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SINGLE CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT Table-1 Pin Description (Continued) Name Type Pin No. SDO O 23 SDO: Serial Data Output In serial microcontroller interface mode, this signal is the output data of the serial interface. Configuration ...
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SINGLE CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT Table-1 Pin Description (Continued) Name Type Pin No. AD5 I/O 31 AD5: Address/Data Bus bit5 In Intel/Motorola multiplexed interface mode, this signal is the multiplexed bi-directional address/data bus of the microcontroller ...
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SINGLE CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT Table-1 Pin Description (Continued) Name Type Pin No. THZ I 13 THZ: Transmitter Driver High Impedance Enable This signal enables or disables transmitter driver. A low level on this pin enables ...
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SINGLE CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT 3 FUNCTIONAL DESCRIPTION 3.1 CONTROL MODE SELECTION The IDT82V2081 can be configured by software or by hardware. The software control mode supports Serial Control Interface, Motorola Multi- plexed Control Interface and ...
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SINGLE CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT TTIP IDT82V2081 TRING = 75 Ω (nom), V Note: 1. For R (Peak)=2.37V (nom) LOAD out 2. For R =120 Ω (nom), V (Peak)=3.00V (nom) LOAD out Figure-4 E1 Pulse Template ...
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SINGLE CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT Transmit Waveform Value For E1 75 Ω 1.Table-2 Transmit Waveform Value For E1 120 Ω 2.Table-3 3. Table-4 Transmit Waveform Value For T1 0~133 ft 4.Table-5 Transmit Waveform Value For T1 ...
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SINGLE CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT Table-5 Transmit Waveform Value For T1 133~266 ft Sample 0011011 1000011 2 0101110 1000010 3 0101100 1000001 4 0101010 0000000 5 0101001 0000000 6 0101000 0000000 ...
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SINGLE CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT Table-9 Transmit Waveform Value For J1 0~655 ft Sample 0010111 1000010 2 0100111 1000001 3 0100111 0000000 4 0100110 0000000 5 0100101 0000000 6 0100101 0000000 ...
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SINGLE CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT Table-13 Transmit Waveform Value For DS1 -22.5 dB LBO Sample 0000000 0101100 2 0000000 0101110 3 0000000 0110000 4 0000000 0110001 5 0000001 0110010 6 0000011 ...
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SINGLE CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT 3.4 RECEIVE PATH The receive path consists of Receive Internal Termination, Monitor Gain, Amplitude/Wave Shape Detector, Digital Tuning Controller, Adaptive Equalizer, Data Slicer, CDR (Clock & Data Recovery), Optional Jitter Attenuator, ...
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SINGLE CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT In hardware control mode, TERM, PULS[3:0] pins can be used to select impedance matching for both receiver and transmitter. If TERM pin is low, external impedance network will be used for ...
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SINGLE CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT 3.4.8 RECEIVE PATH SYSTEM INTERFACE The receive path system interface consists of RCLK pin, RD/RDP pin and RDN pin mode, the RCLK outputs a recovered 2.048 MHz clock. In ...
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SINGLE CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT 3.6 LOS AND AIS DETECTION 3.6.1 LOS DETECTION The Loss of Signal Detector monitors the amplitude of the incoming sig- nal level and pulse density of the received signal on RTIP ...
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SINGLE CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT Table-18 LOS Declare and Clear Criteria for Long Haul Mode Control bit T1E1 LAC LOS[4:0] 00000 00001 … 0 T1.231 10001 … 10101 10110-11111 00000 - … 00110 1=T1/J1 I.431 00111 ...
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SINGLE CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT 3.7 TRANSMIT AND DETECT INTERNAL PATTERNS The internal patterns (All Ones, All Zeros, PRBS/QRSS pattern and Activate/Deactivate Loopback Code) will be generated and detected by IDT82V2081. TCLK is used as the ...
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SINGLE CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT LOS/AIS LOS Detection RCLK B8ZS/ RD/RDP HDB3/AMI CV/RDN Decoder B8ZS/ TCLK HDB3/AMI TD/TDP Encoder TDN LOS/AIS LOS Detection RCLK B8ZS/ Jitter RD/RDP HDB3/AMI Attenuator CV/RDN Decoder B8ZS/ TCLK Jitter TD/TDP HDB3/AMI ...
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SINGLE CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT 3.8.4 INBAND LOOPBACK When PATT[1:0] bits (MAINT0, 0DH) are set to ‘11’, the IDT82V2081 is configured in Inband Loopback mode. In this mode, an unframed activate/ Deactivate Loopback Code is generated ...
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SINGLE CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT 3.9 ERROR DETECTION/COUNTING AND INSERTION 3.9.1 DEFINITION OF LINE CODING ERROR The following line encoding errors can be detected and counted by the IDT82V2081: • Received Bipolar Violation (BPV) Error: In ...
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SINGLE CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT • Manual Report Mode In Manual Report Mode, the internal Error Counter starts to count the received errors when the CNT_MD bit (MAINT6, 13H) is set to ‘0’. When there is ...
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SINGLE CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT 3.11 MCLK AND TCLK 3.11.1 MASTER CLOCK (MCLK) MCLK is an independent, free-running reference clock. MCLK is 1.544 MHz for T1/J1 applications and 2.048 MHz in E1 mode. This reference clock ...
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SINGLE CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT 3.12 MICROCONTROLLER INTERFACES The microcontroller interface provides access to read and write the reg- isters in the device. The chip supports serial microcontroller interface and two kinds of parallel microcontroller interface: ...
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SINGLE CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT 3.13 INTERRUPT HANDLING All kinds of interrupt of the IDT82V2081 are indicated by the When the INT_PIN[0] bit (GCF, 02H) is ‘0’, the low, with a 10 KΩ external pull-up resistor. ...
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SINGLE CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT 4 PROGRAMMING INFORMATION 4.1 REGISTER LIST AND MAP The registers banks include control registers, status registers and counter registers. Table-23 Register List and Map Address (hex) Register R/W Control Registers 00 ...
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SINGLE CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT 4.2 REGISTER DESCRIPTION 4.2.1 CONTROL REGISTERS Table-24 ID: Device Revision Register (R, Address = 00H) Symbol Bit Default ID[7:0] 7-0 00H Table-25 RST: Reset Register (W, Address = 01H) Symbol Bit ...
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SINGLE CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT Table-28 JACF: Jitter Attenuation Configuration Register (R/W, Address = 04H) Symbol Bit Default - 7-6 00 JA_LIMIT 5 1 JACF[1:0] 4-3 00 JADP[1:0] 2-1 00 JABW 0 0 4.2.2 TRANSMIT PATH ...
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SINGLE CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT Table-30 TCF1: Transmitter Configuration Register 1 (R/W, Address = 06H) Symbol Bit Default - 7-6 00 Reserved. This bit should be ‘0’ for normal operation. DFM_OFF 5 0 Transmit driver failure ...
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SINGLE CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT Table-32 TCF3: Transmitter Configuration Register 3 (R/W, Address = 08H) Symbol Bit Default DONE UI[1:0] 5-4 00 SAMP[3:0] 3-0 0000 Table-33 TCF4: Transmitter Configuration Register 4 ...
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SINGLE CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT Table-35 RCF1: Receiver Configuration Register 1 (R/W, Address= 0BH) Symbol Bit Default - 7 0 EQ_ON LOS[4:0] 4:0 10101 Reserved = 0: Receive equalizer off (short ...
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SINGLE CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT Table-36 RCF2: Receiver Configuration Register 2 (R/W, Address = 0CH) Symbol Bit Default - 7-6 00 SLICE[1:0] 5-4 01 UPDW[1:0] 3-2 10 MG[1:0] 1-0 00 4.2.4 NETWORK DIAGNOSTICS CONTROL REGISTERS Table-37 ...
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SINGLE CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT Table-38 MAINT1: Maintenance Function Control Register 1 (R/W, Address= 0EH) Symbol Bit Default - 7-4 0000 ARLP 3 0 RLP 2 0 ALP 1 0 DLP 0 0 Table-39 MAINT2: Maintenance ...
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SINGLE CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT Table-41 MAINT4: Maintenance Function Control Register 4 (R/W, Address = 11H) Symbol Bit Default RIBLBA[7:0] 7-0 (000)00001 Defines the user-programmable receive Inband loopback activate code. The default selection is 00001. Table-42 ...
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SINGLE CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT 4.2.5 INTERRUPT CONTROL REGISTERS Table-44 INTM0: Interrupt Mask Register 0 (R/W, Address = 14H) Symbol Bit Default EQ_IM 7 1 IBLBA_IM 6 1 IBLBD_IM 5 1 PRBS_IM 4 1 TCLK_IM 3 ...
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SINGLE CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT Table-45 INTM1: Interrupt Masked Register 1 (R/W, Address = 15H) Symbol Bit Default DAC_OV_IM 7 1 JAOV_IM 6 1 JAUD_IM 5 1 ERR_IM 4 1 EXZ_IM 3 1 CV_IM 2 1 ...
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SINGLE CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT Table-46 INTES: Interrupt Trigger Edge Select Register (R/W, Address = 16H) Symbol Bit Default EQ_IES 7 0 IBLBA_IES 6 0 IBLBD_IES 5 0 PRBS_IES 4 0 TCLK_IES 3 0 DF_IES 2 ...
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SINGLE CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT 4.2.6 LINE STATUS REGISTERS Table-47 STAT0: Line Status Register 0 (real time status monitor) (R, Address = 17H) Symbol Bit Default EQ_S 7 0 IBLBA_S 6 0 IBLBD_S 5 0 PRBS_S ...
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SINGLE CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT Table-47 STAT0: Line Status Register 0 (real time status monitor) (Continued) (R, Address = 17H) Symbol Bit Default AIS_S 1 0 LOS_S 0 0 Table-48 STAT1: Line Status Register 1 (real ...
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SINGLE CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT 4.2.7 INTERRUPT STATUS REGISTERS Table-49 INTS0: Interrupt Status Register 0 (R, Address = 19H) (this register is reset and relevant interrupt request is cleared after a read) Symbol Bit Default EQ_IS ...
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SINGLE CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT Table-50 INTS1: Interrupt Status Register 1 (R, Address = 1AH) (this register is reset and the relevant interrupt request is cleared after a read) Symbol Bit Default DAC_OV_IS 7 0 JAOV_IS ...
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SINGLE CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT 5 HARDWARE CONTROL PIN SUMMARY Table-53 Hardware Control Pin Summary Pin No. Symbol TQFP 17 MODE1 MODE[1:0]: Operation mode of control interface select 16 MODE0 00= Hardware interface 01= Serial interface ...
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SINGLE CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT Table-53 Hardware Control Pin Summary (Continued) Pin No. Symbol TQFP 15 JA1 JA[1:0]: Jitter attenuation position , bandwidth and the depth of FIFO select 14 JA0 00 disabled 01= ...
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SINGLE CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT 6 TEST SPECIFICATIONS Table-54 Absolute Maximum Rating Symbol VDDA, VDDD Core Power Supply VDDIO I/O Power Supply VDDT Transmit Power Supply Input Voltage, Any Digital Pin Vin Input Voltage, Any RTIP ...
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SINGLE CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT Table-56 Power Consumption Symbol Parameter E1, 3 Ω Load E1, 3.3 V, 120 Ω Load 3 T1, 3.3 V, 100 Ω Load J1, 3.3 V, 110 Ω Load 1.Maximum ...
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SINGLE CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT Table-58 E1 Receiver Electrical Characteristics Symbol Parameter Receiver sensitivity Short haul with cable loss@1024kHz: Long haul with cable loss@1024kHz: Analog LOS level Short haul Long haul Allowable consecutive zeros before LOS ...
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SINGLE CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT Table-59 T1/J1 Receiver Electrical Characteristics Symbol Parameter receiver sensitivity Short haul with cable loss@772kHz: Long haul with cable loss@772kHz: Analog LOS level Short haul Long haul Allowable consecutive zeros before LOS ...
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SINGLE CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT Table-60 E1 Transmitter Electrical Characteristics Symbol Vo-p Output pulse amplitudes E1, 75Ω load E1, 120Ω load Vo-s Zero (space) level E1, 75Ω load E1, 120Ω load Transmit amplitude variation with supply ...
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SINGLE CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT Table-61 T1/J1 Transmitter Electrical Characteristics Symbol Vo-p Output pulse amplitudes Vo-s Zero (space) level Transmit amplitude variation with supply Difference between pulse sequences for 17 consecutive pulses (T1.102) TPW Output Pulse ...
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SINGLE CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT Table-62 Transmitter and Receiver Timing Characteristics Symbol MCLK frequency E1: T1/J1: MCLK tolerance MCLK duty cycle Transmit path TCLK frequency E1: T1/J1: TCLK tolerance TCLK Duty Cycle t1 Transmit Data Setup ...
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SINGLE CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT TCLK TD/TDP TDN RCLK RDP/RD (RCLK_SEL = 0 software mode) (RCLKE = 0 hardware mode) RDN/CV RDP/RD (RCLK_SEL = 1 software mode) (RCLKE = 1 hardware mode) RDN/CV Table-63 Jitter Tolerance ...
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SINGLE CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT Figure-22 E1 Jitter Tolerance Performance Figure-23 T1/J1 Jitter Tolerance Performance 60 INDUSTRIAL TEMPERATURE RANGES ...
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SINGLE CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT Table-64 Jitter Attenuator Characteristics Parameter Jitter Transfer Function Corner (-3dB) Frequency Jitter Attenuator E1: (G.736 400 Hz @ 100 kHz T1/J1: (Per AT&T pub.62411) ...
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SINGLE CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT Figure-24 E1 Jitter Transfer Performance Figure-25 T1/J1 Jitter Transfer Performance 62 INDUSTRIAL TEMPERATURE RANGES ...
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SINGLE CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT 7 MICROCONTROLLER INTERFACE TIMING CHARACTERISTICS 7.1 SERIAL INTERFACE TIMING Table-65 Serial Interface Timing Characteristics Symbol t1 SCLK High Time t2 SCLK Low Time t3 Active CS to SCLK Setup Time t4 ...
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SINGLE CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT 7.2 PARALLEL INTERFACE TIMING Table-66 Multiplexed Motorola Read Timing Characteristics Symbol tRC Read Cycle Time tDW Valid DS Width tRWV Delay from DS to Valid Read tRWH R Hold ...
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SINGLE CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT Table-67 Multiplexed Motorola Write Timing Characteristics Symbol tWC Write Cycle Time tDW Valid DS Width tRWV Delay from DS to Valid Write tRWH R Hold Time tASW Valid AS ...
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SINGLE CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT Table-68 Multiplexed Intel Read Timing Characteristics Symbol Parameter tRC Read Cycle Time tRDW Valid RD Width tARD Delay from ALE to Valid Read tALEW Valid ALE Width tADS Address to ALE ...
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SINGLE CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT Table-69 Multiplexed Intel Write Timing Characteristics Symbol tWC Write Cycle Time tWRW Valid WR Width tALEW Valid ALE Width tAWD Delay from ALE to Valid Write tADS Address to ALE Setup ...
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SINGLE CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT ORDERING INFORMATION XXXXXXX Device Type DATASHEET DOCUMENT HISTORY 08/26/2003 pgs. 17, 18, 19, 20, 29, 30, 41, 55, 56 07/19/2004 pgs. 30, 56, 57 02/11/2009 pg. 68 removed IDT from orderable ...