WBLXT9785HE.D0-865114 Cortina Systems Inc, WBLXT9785HE.D0-865114 Datasheet - Page 138

• Manufacturer Part Number: WBLXT9785HE.D0-865114
• Manufacturer: Cortina Systems Inc

Specifications of WBLXT9785HE.D0-865114

• Lead Free Status / RoHS Status: Compliant

LXT9785/LXT9785E
Datasheet
249241, Revision 11.0
16 April 2007
4.8.2
4.8.3
4.8.4
4.8.5
Figure 24
Cortina Systems
Transmit Enable
TxENn must be asserted and de-asserted synchronously with REFCLK. The MAC must
assert TxENn at the same time as the first nibble of preamble. TxENn must be de-
asserted after the last bit of the packet.
Carrier Sense & Data Valid
The LXT9785/LXT9785E asserts CRS_DVn when it detects activity on the line. However,
RxDatan outputs zeros until the received data is decoded and available for transfer to the
controller.
Receive Error
Whenever the LXT9785/LXT9785E receives an error symbol from the network, it asserts
RxERn. When it detects a bad Start-of-Stream Delimiter (SSD) it drives a “10” jam pattern
on the RxData pins to indicate a false carrier event.
Out-of-Band Signaling
The LXT9785/LXT9785E has the capability of encoding status information in the RxData
stream during IPG. See 4B/5B Coding Operations
The 100BASE-X protocol specifies the use of a 5-bit symbol code on the network media.
However, data is normally transmitted across the RMII interface in 2-bit nibblets or “di-
bits”. The LXT9785/LXT9785E incorporates a parallel/serial converter that translates
between di-bit pairs and 4-bit nibbles, and a 4B/5B encoder/decoder circuit that translates
between 4-bit nibbles and 5-bit symbols for the 100BASE-X connection.
the data conversion flow from nibbles to symbols.
symbol coding (not all symbols are valid).
RMII Data Flow
®
LXT9785 and LXT9785E Advanced 8-Port 10/100 Mbps PHY Transceivers
D0
D1
Reduced MII Mode Data Flow
di-bit
pairs
D2
D3
Parallel
Parallel
Serial
Serial
to
to
D0 D1 D2 D3
nibbles
4-bit
4B/5B
S0 S1 S2 S3 S4
symbols
5-bit
Table 46 on page 142
Scramble
Scramble
De-
MLT3
4.8 RMII Operation
Figure 24
shows 4B/5B
pattern: 0, +1, 0, -1, 0, +1...
All transitions must follow
0
No Transition = 0.
Transition = 1.
+1
0
Page 138
shows
-1
0