WBLXT9785HE.D0-865114 Cortina Systems Inc, WBLXT9785HE.D0-865114 Datasheet - Page 180

• Manufacturer Part Number: WBLXT9785HE.D0-865114
• Manufacturer: Cortina Systems Inc

Specifications of WBLXT9785HE.D0-865114

• Lead Free Status / RoHS Status: Compliant

LXT9785/LXT9785E
Datasheet
249241, Revision 11.0
16 April 2007
Figure 46
Table 68
Figure 47
Cortina Systems
SS-SMII - 100BASE-TX Transmit Timing
SS-SMII - 100BASE-TX Transmit Timing
SS-SMII - 100BASE-FX Receive Timing
®
TxSYNC setup to TxCLK rising edge and
TxData setup to TxCLK rising edge
TxSYNC hold from TxCLK rising edge and
TxData hold to TxCLK rising edge
TxEN sampled to start of /J/
1. Typical values are at 25 °C and are for design aid only; not guaranteed and not subject to production
2. “BT” signifies bit times at the line rate (that is, BT = 100 ns if using 10BASE-T, BT = 10 ns if using
Note:
LXT9785 and LXT9785E Advanced 8-Port 10/100 Mbps PHY Transceivers
testing.
100BASE-TX or 100BASE-FX).
The table latency values are derived with the hardware configuration pins FIFOSEL[1:0] set at a
default configuration of 00 (32 bits of initial fill).
TxSYNC
TxData
TxCLK
TPFO
REFCLK
RxSYNC
RxData
RxCLK
Parameter
TPFI
t
1
t
4
t
2
t
t
1
3
t
2
Sym
t
t1
t2
t3
3
t
3
Min
1.5
1.0
–
Typ1
t
1
11
–
–
t
3
t
2
Max
18
–
–
t
5
6.0 Test Specifications
Units
BT
ns
ns
2
Conditions
Test
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