WBLXT9785HE.D0-865114 Cortina Systems Inc, WBLXT9785HE.D0-865114 Datasheet - Page 17

• Manufacturer Part Number: WBLXT9785HE.D0-865114
• Manufacturer: Cortina Systems Inc

Specifications of WBLXT9785HE.D0-865114

• Lead Free Status / RoHS Status: Compliant

LXT9785/LXT9785E
Datasheet
249241, Revision 11.0
16 April 2007
Cortina Systems
Page
Page
146
148
168
102
122
126
128
128
131
133
140
141
61
85
93
97
97
99
1
Description
Modified Table 69 “Port Configuration Register (Address 16, Hex 10)” (Bits 16.5 and 16.6)
Modified Table 71 “Interrupt Enable Register (Address 18, Hex 12)”
Added product ordering table and diagram.
Description
Modified and added new language to front page.
Reset: Modified language in first paragraph.
Added new section on DTE discovery.
Supported JTAG Instructions table: replaced long hit streams with hex.
LED Circuit: Modified paragraph language.
LED Circuit diagram: Modified diagram.
Replaced Typical Fiber Interface diagram.
Required Clock Characteristics table: Replaced SMII Input frequency and RMII Input frequency symbol with “f”.
Auto-Negotiation and Fast Link Pulse Timing Parameters: FLP burst width under Typ = 2.
Control Register table: Modified table and table notes.
PHY Identification Register 2 (Address 3): Modified table.
PHY Identifier Bit Mapping: Modified diagram.
Auto-Negotiation Expansion: Modified table and table notes.
Port Configuration Register table: Modified table and table notes.
Trim Enable Register: Modified table (DTE Discovery).
Modified Register Bit Map table.
®
LXT9785 and LXT9785E Advanced 8-Port 10/100 Mbps PHY Transceivers
Revision Date: January 2002
Revision Date: April 2001
Revision Number: 005
Revision Number: 003
Revision History
Page 17