PIC18F64J11T-I/PT Microchip Technology, PIC18F64J11T-I/PT Datasheet - Page 372

• Manufacturer Part Number: PIC18F64J11T-I/PT
• Description: 16KB, Flash, 1024bytes-RAM, 51I/O, 8-bit Family,nanoWatt 64 TQFP 10x10x1mm T/R
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F64J11T-I/PT

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 51
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TFQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: MA180018 - MODULE PLUG-IN 18F85J11AC162079 - HEADER MPLAB ICD2 18F85J90 64/80AC164327 - MODULE SKT FOR 64TQFP
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: PIC18F64J11T-I/PTTR

PIC18F85J11 FAMILY
FIGURE 26-10:
TABLE 26-12: RESET, WATCHDOG TIMER, OSCILLATOR START-UP TIMER, POWER-UP TIMER
DS39774D-page 372
30
31
32
33
34
38
39
Note 1:
Param
No.
Note:
Watchdog
Oscillator
Time-out
Time-out
I/O pins
Internal
Internal
PWRT
MCLR
Reset
Reset
Timer
Symbol
T
T
T
T
T
T
T
POR
V
OST
CSD
MC
WDT
PWRT
IOZ
IOBST
DD
To ensure device Reset, MCLR must be low for at least 2 T
Refer to Figure 26-3 for load conditions.
L
MCLR Pulse Width (low)
Watchdog Timer Time-out Period
(no postscaler)
Oscillator Start-up Timer Period
Power-up Timer Period
I/O High-Impedance from MCLR
Low or Watchdog Timer Reset
CPU Start-up Time
Time for INTOSC to Stabilize
AND BROWN-OUT RESET REQUIREMENTS
RESET, WATCHDOG TIMER, OSCILLATOR START-UP TIMER AND
POWER-UP TIMER TIMING
33
Characteristic
32
1024 T
2 T
45.8
Min
3.4
—
—
—
—
CY
OSC
34
10 T
30
65.5
Typ
200
4.0
10
—
2
1
CY
CY
or 400 s, which ever is lower.
1024 T
Max
85.2
4.6
—
—
—
—
—
OSC
31
 2010 Microchip Technology Inc.
Units
ms
ms
s
s
s
s
(Note 1)
T
Voltage regulator
enabled and put to
Sleep
OSC
34
Conditions
= OSC1 period