STM32F100RET6B STMicroelectronics, STM32F100RET6B Datasheet - Page 66

• Manufacturer Part Number: STM32F100RET6B
• Description: 16/32-BITS MICROS
• Manufacturer: STMicroelectronics
• Series: STM32r

Specifications of STM32F100RET6B

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 24MHz
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: DMA, PDR, POR, PVD, PWM, Temp Sensor, WDT
• Number Of I /o: 51
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 16x12b; D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-LQFP
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Electrical characteristics
5.3.11
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EMC characteristics
Susceptibility tests are performed on a sample basis during device characterization.
Functional EMS (Electromagnetic susceptibility)
While a simple application is executed on the device (toggling 2 LEDs through I/O ports). the
device is stressed by two electromagnetic events until a failure occurs. The failure is
indicated by the LEDs:
●
●
A device reset allows normal operations to be resumed.
The test results are given in
defined in application note AN1709.
Table 38.
Designing hardened software to avoid noise problems
EMC characterization and optimization are performed at component level with a typical
application environment and simplified MCU software. It should be noted that good EMC
performance is highly dependent on the user application and the software in particular.
Therefore it is recommended that the user applies EMC software optimization and pre
qualification tests in relation with the EMC level requested for his application.
Software recommendations
The software flowchart must include the management of runaway conditions such as:
●
●
●
Prequalification trials
Most of the common failures (unexpected reset and program counter corruption) can be
reproduced by manually forcing a low state on the NRST pin or the Oscillator pins for 1
second. To complete these trials, ESD stress can be applied directly on the device, over the
range of specification values. When unexpected behavior is detected, the software can be
hardened to prevent unrecoverable errors occurring (see application note AN1015).
V
V
Symbol
FESD
EFTB
Electrostatic discharge (ESD) (positive and negative) is applied to all device pins until
a functional disturbance occurs. This test is compliant with the IEC 61000-4-2 standard.
FTB: A Burst of Fast Transient voltage (positive and negative) is applied to V
V
compliant with the IEC 61000-4-4 standard.
Corrupted program counter
Unexpected reset
Critical Data corruption (control registers...)
SS
through a 100 pF capacitor, until a functional disturbance occurs. This test is
Voltage limits to be applied on any I/O pin to
induce a functional disturbance
Fast transient voltage burst limits to be
applied through 100 pF on V
to induce a functional disturbance
EMS characteristics
Parameter
Table
Doc ID 15081 Rev 5
38. They are based on the EMS levels and classes
DD
and V
STM32F100xC, STM32F100xD, STM32F100xE
SS
pins
V
f
package, conforms to
IEC 61000-4-2
V
f
package, conforms to
IEC 61000-4-4
HCLK
HCLK
DD
DD
= 3.3 V, T
= 3.3 V, T
= 24 MHz, LQFP144
= 24 MHz, LQFP144
Conditions
A
A
= +25 °C,
= +25 °C,
Level/Class
DD
2B
4A
and