SAA7154E/V2/G,518 NXP Semiconductors, SAA7154E/V2/G,518 Datasheet - Page 26

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SAA7154E/V2/G,518

Manufacturer Part Number
SAA7154E/V2/G,518
Description
Manufacturer
NXP Semiconductors
Datasheet

Specifications of SAA7154E/V2/G,518

Adc/dac Resolution
10b
Screening Level
Commercial
Package Type
LBGA
Pin Count
156
Lead Free Status / RoHS Status
Compliant
NXP Semiconductors
SAA7154E_SAA7154H_2
Product data sheet
The input/output data relation limits overall H and V zooming.
The video scaler receives its input signal from the video decoder or from the expansion
port (X-port). It gets 16-bit Y-C
27 MHz from the decoder. A discontinuous data stream can be accepted from the
expansion port (X-port), normally 8-bit wide ITU-656 like Y-C
pixel qualifier on pin XDQ.
The scaler operation is defined by two programming pages A and B, representing two
different tasks, that can be applied field alternating or to define two regions in a field (e.g.
with different scaling range, factors and signal source during odd and even fields).
Fig 12. Functional block diagram of the scaler data path
ADC1, ADC2
input data
Rev. 02 — 6 December 2007
YUV
SCALER POST PROCESSING
INPUT WINDOW CONTROL
3
PAGE (TASK) HANDLING
SHARPNESS CONTROL
references
16 SEGMENT CURVE
data
(OUT AQUISITION)
B
OUTPUT WINDOW
(EVENT HANDLER)
10 bit
AND SCALER BCS
HORIZONTAL FINE
(PHASE) SCALING
FIR PRE-FILTER,
-C
H, V
PRE-SCALER
CONTROL
VERTICAL
R
LINE FIFO
YUV2RGB
RGB2YUV
SCALING
BUFFER
EDGI
4 : 2 : 2 input data at a continuous rate of 13.5 MHz or
(VPD)
qualifier
data qualifier
H,V gates,
data
SAA7154E; SAA7154H
Multistandard video decoder with comb filter
request
data
page select
001aab945
PROGRAMMING
PAGE A/B MUX
REGISTERS
B
-C
R
data, accompanied by a
© NXP B.V. 2007. All rights reserved.
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