MC9S12XDP512MAG Freescale, MC9S12XDP512MAG Datasheet - Page 1119

• Manufacturer Part Number: MC9S12XDP512MAG
• Manufacturer: Freescale

Specifications of MC9S12XDP512MAG

• Cpu Family: HCS12
• Device Core Size: 16b
• Frequency (max): 40MHz
• Interface Type: CAN/I2C/SCI/SPI
• Total Internal Ram Size: 32KB
• # I/os (max): 119
• Number Of Timers - General Purpose: 12
• Operating Supply Voltage (typ): 2.5/5V
• Operating Supply Voltage (max): 2.75/5.5V
• Operating Supply Voltage (min): 2.35/3.15V
• On-chip Adc: 2(24-chx10-bit)
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 144
• Package Type: LQFP
• Program Memory Type: Flash
• Program Memory Size: 512KB
• Lead Free Status / RoHS Status: Compliant

27.3.2.5.1
The general guideline is that Flash protection can only be added and not removed.
all valid transitions between Flash protection scenarios. Any attempt to write an invalid scenario to the
FPROT register will be ignored and the FPROT register will remain unchanged. The contents of the
FPROT register reflect the active protection scenario. See the FPHS and FPLS descriptions for additional
restrictions.
27.3.2.6
The FSTAT register defines the operational status of the module.
Freescale Semiconductor
Reset
Reset
W
W
R
R
CBEIF
CBEIF
1 Allowed transitions marked with X.
Flash Status Register (FSTAT)
Protection Scenario
1
1
7
7
Flash Protection Restrictions
From
= Unimplemented or Reserved
= Unimplemented or Reserved
0
1
2
3
4
5
6
7
Figure 27-12. Flash Status Register (FSTAT — Normal Mode)
Figure 27-13. Flash Status Register (FSTAT — Special Mode)
CCIF
CCIF
1
1
6
6
Table 27-15. Flash Protection Scenario Transitions
X
X
MC9S12XDP512 Data Sheet, Rev. 2.21
0
PVIOL
PVIOL
0
0
5
5
1
X
X
X
X
ACCERR
ACCERR
0
0
4
4
X
X
X
X
2
To Protection Scenario
3
X
X
X
X
X
X
X
X
Chapter 27 512 Kbyte Flash Module (S12XFTX512K4V2)
0
0
0
0
3
3
X
X
X
X
4
BLANK
BLANK
1
X
X
5
0
0
2
2
X
X
6
Table 27-15
FAIL
0
0
0
1
1
X
7
specifies
0
0
0
0
0
0
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