MC9S12XDP512MAG Freescale, MC9S12XDP512MAG Datasheet - Page 1155

• Manufacturer Part Number: MC9S12XDP512MAG
• Manufacturer: Freescale

Specifications of MC9S12XDP512MAG

• Cpu Family: HCS12
• Device Core Size: 16b
• Frequency (max): 40MHz
• Interface Type: CAN/I2C/SCI/SPI
• Total Internal Ram Size: 32KB
• # I/os (max): 119
• Number Of Timers - General Purpose: 12
• Operating Supply Voltage (typ): 2.5/5V
• Operating Supply Voltage (max): 2.75/5.5V
• Operating Supply Voltage (min): 2.35/3.15V
• On-chip Adc: 2(24-chx10-bit)
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 144
• Package Type: LQFP
• Program Memory Type: Flash
• Program Memory Size: 512KB
• Lead Free Status / RoHS Status: Compliant

CBEIE, CCIE and KEYACC bits are readable and writable while all remaining bits read 0 and are not
writable in normal mode. KEYACC is only writable if KEYEN (see
Register (FSEC)”
mass erase and erase verify operations. When writing to the FCNFG register in special mode, all
unimplemented/ reserved bits must be written to 0.
28.3.2.5
The FPROT register defines which Flash sectors are protected against program or erase operations.
Freescale Semiconductor
KEYACC
BKSEL
Reset
Reset
CBEIE
Field
CCIE
7
6
5
0
W
W
R
R
CBEIE
CBEIE
Command Buffer Empty Interrupt Enable — The CBEIE bit enables an interrupt in case of an empty command
buffer in the Flash module.
0 Command buffer empty interrupt disabled.
1 An interrupt will be requested whenever the CBEIF flag (see
Command Complete Interrupt Enable — The CCIE bit enables an interrupt in case all commands have been
completed in the Flash module.
0 Command complete interrupt disabled.
1 An interrupt will be requested whenever the CCIF flag (see
Enable Security Key Writing
0 Flash writes are interpreted as the start of a command write sequence.
1 Writes to Flash array are interpreted as keys to open the backdoor. Reads of the Flash array return invalid
Block Select — The BKSEL bit indicates which register bank is active.
0 Select register bank associated with Flash block 0.
1 Select register bank associated with Flash block 1.
Flash Protection Register (FPROT)
0
0
7
7
(FSTAT)”)
is set.
data.
is set to the enabled state. BKSEL is readable and writable in special mode to simplify
Figure 28-8. Flash Configuration Register (FCNFG — Normal Mode)
Figure 28-9. Flash Configuration Register (FCNFG — Special Mode)
= Unimplemented or Reserved
= Unimplemented or Reserved
is set.
CCIE
CCIE
0
0
6
6
Table 28-8. FCNFG Field Descriptions
KEYACC
KEYACC
MC9S12XDP512 Data Sheet, Rev. 2.21
0
0
5
5
Undefined
Undefined
0
0
4
4
Description
Chapter 28 256 Kbyte Flash Module (S12XFTX256K2V1)
0
0
0
0
3
3
Section 28.3.2.6, “Flash Status Register
Section 28.3.2.6, “Flash Status Register
Section 28.3.2.2, “Flash Security
0
0
0
0
2
2
0
0
0
0
1
1
BKSEL
(FSTAT)”)
0
0
0
0
0
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