MC9S12XDP512MAG Freescale, MC9S12XDP512MAG Datasheet - Page 131

• Manufacturer Part Number: MC9S12XDP512MAG
• Manufacturer: Freescale

Specifications of MC9S12XDP512MAG

• Cpu Family: HCS12
• Device Core Size: 16b
• Frequency (max): 40MHz
• Interface Type: CAN/I2C/SCI/SPI
• Total Internal Ram Size: 32KB
• # I/os (max): 119
• Number Of Timers - General Purpose: 12
• Operating Supply Voltage (typ): 2.5/5V
• Operating Supply Voltage (max): 2.75/5.5V
• Operating Supply Voltage (min): 2.35/3.15V
• On-chip Adc: 2(24-chx10-bit)
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 144
• Package Type: LQFP
• Program Memory Type: Flash
• Program Memory Size: 512KB
• Lead Free Status / RoHS Status: Compliant

4.3.2.2
Writes to this register will abort current conversion sequence but will not start a new sequence.
Read: Anytime
Write: Anytime
Freescale Semiconductor
ETRIGCH[3:0]
ETRIGSEL
Reset
Field
3:0
W
7
R
ETRIGSEL
ATD Control Register 1 (ATDCTL1)
0
7
External Trigger Source Select — This bit selects the external trigger source to be either one of the AD
channels or one of the ETRIG[3:0] inputs. See device specification for availability and connectivity of
ETRIG[3:0] inputs. If ETRIG[3:0] input option is not available, writing a 1 to ETRISEL only sets the bit but has
no effect, that means one of the AD channels (selected by ETRIGCH[3:0]) remains the source for external
trigger. The coding is summarized in
External Trigger Channel Select — These bits select one of the AD channels or one of the ETRIG[3:0] inputs
as source for the external trigger. The coding is summarized in
WRAP3
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
= Unimplemented or Reserved
0
0
6
WRAP2
Table 4-3. Multi-Channel Wrap Around Coding
Figure 4-4. ATD Control Register 1 (ATDCTL1)
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
Table 4-4. ATDCTL1 Field Descriptions
MC9S12XDP512 Data Sheet, Rev. 2.21
0
0
5
WRAP1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
Table
Chapter 4 Analog-to-Digital Converter (ATD10B16CV4) Block Description
WRAP0
4-5.
0
0
4
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Description
ETRIGCH3
(MULT = 1) Wrap Around to AN0
Multiple Channel Conversions
1
3
after Converting
Table
Reserved
ETRIGCH2
AN10
AN11
AN12
AN13
AN14
AN15
4-5.
AN1
AN2
AN3
AN4
AN5
AN6
AN7
AN8
AN9
1
2
ETRIGCH1
1
1
ETRIGCH0
1
0
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