AMD-K6-IIIE+550ACR AMD (ADVANCED MICRO DEVICES), AMD-K6-IIIE+550ACR Datasheet - Page 222

• Manufacturer Part Number: AMD-K6-IIIE+550ACR
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of AMD-K6-IIIE+550ACR

• Lead Free Status / RoHS Status: Not Compliant

AMD-K6™-IIIE+ Embedded Processor Data Sheet
8.2
8.3
Output Signals
Registers
200
RESET Requirements
State of Processor After RESET
During the initial power-on reset of the processor, RESET must
remain asserted for a minimum of 1.0 ms after CLK and V
reach specification. (See “CLK Switching Characteristics” on
page 298 for clock specifications. “Electrical Data” beginning
on page 287 for V
D u r i n g a wa r m re s e t w h i l e C L K a n d V
specification, RESET must remain asserted for a minimum of
15 clocks prior to its negation.
Table 34 show s the state of all proc essor outputs and
bidirectional signals immediately after RESET is sampled
asserted.
Table 34. Output Signal State After RESET
Notes:
1. Supported on low-power versions only.
Table 35 on page 201 shows the state of all architecture
registers and Model-Specific Registers (MSRs) after the
processor has completed its initialization due to the recognition
of the assertion of RESET.
Signal
A[31:3], AP
ADS#, ADSC#
APCHK#
BE[7:0]#
BREQ
CACHE#
D/C#
D[63:0], DP[7:0]
FERR#
HIT#
HITM#
HLDA
Power-on Configuration and Initialization
Preliminary Information
CC
specifications.)
Floating
Floating
Floating
State
High
High
High
High
High
High
Low
Low
Low
Signal
LOCK#
M/IO#
PCD
PCHK#
PWT
SCYC
SMIACT#
TDO
VCC2DET
VCC2H/L#
VID[4:0]
W/R#
1
23543A/0—September 2000
C C
a re w i t h i n
Floating
01010b
State
High
High
High
Low
Low
Low
Low
Low
Low
Low
Chapter 8
CC