IDT5V9885CPFI IDT, Integrated Device Technology Inc, IDT5V9885CPFI Datasheet - Page 24

• Manufacturer Part Number: IDT5V9885CPFI
• Description: IC CLK GEN 3.3V EEPROM 32-TQFP
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: Clock Generatorr

Specifications of IDT5V9885CPFI

• Pll: Yes with Bypass
• Input: LVCMOS, LVTTL, Crystal
• Output: LVCMOS, LVDS, LVPECL, LVTTL
• Number Of Circuits: 1
• Ratio - Input:output: 2:8
• Differential - Input:output: No/Yes
• Frequency - Max: 500MHz
• Divider/multiplier: Yes/Yes
• Voltage - Supply: 3.135 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 32-TQFP, 32-VQFP
• Frequency-max: 500MHz
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 5V9885CPFI

NOTE:
PROGWRITE is for writing to the 5V9885C registers.
PROGREAD is for reading the 5V9885C registers.
PROGSAVE is for saving all the contents of the 5V9885C registers to the EEPROM.
PROGRESTORE is for loading the entire EEPROM contents to the 5V9885C registers.
EEPROM INTERFACE
EEPROM by issuing a save instruction (ProgSave) and can be loaded back to the internal programming registers by issuing a restore instruction (ProgRestore).
command code. The save or restore instruction executes after the STOP condition is issued by the Master, during which time the IDT5V9885C will not generate
Acknowledge bits. The IDT5V9885C will acknowledge the instructions after it has completed execution of them. During that time, the I
as busy by all other users of the bus.
During the execution of a ProgSave or ProgRestore instruction, the IDT5V9885C will not accept a new programming instruction (read, write, save, or restore).
All non-programming JTAG instructions will function properly, but the user should wait until the save or restore is complete before issuing a new programming
instruction. If a new programming instruction is issued before the save or restore completes, the new instruction is ignored, and the BYPASS register path remains
in effect for shifting data from TDI to TDO during data register scanning.
JTAG INTERFACE
CLAMP, HIGH-Z and BYPASS, the 5V9885C allows access to internal
programming registers using the REGADDR (set register address), REGDATAR
(read register) and REGDATW (write register instructions. Data is always
accessed by byte, and the register address increments after each read or write.
The full instruction set follows. The IDT5V9885C will be updating the registers
during programming.
PROGSAVE
PROGRESTORE
IDT5V9885C
3.3V EEPROM PROGRAMMABLE CLOCK GENERATOR
S
S
The IDT5V9885C can also store its configuration in an internal EEPROM. The contents of the device's internal programming registers can be saved to the
To initiate a save or restore using I
Using JTAG, the ProgSave and ProgRestore instructions selects the BYPASS register path for shifting the data from TDI to TDO during the data register scanning.
The time it takes for the save (T
T
In addition to the IEEE 1149.1 instructions EXTEST, SAMPLE/PRELOAD,
The JTAG TAP controller can be reset in one of four ways:
1) Power up in JTAG mode
2) Power up in I
3) Apply TRST while in JTAG mode
4) Apply five rising edges of TCK with TMS high while in JTAG mode
SAVE
into JTAG mode with the I
Address
Address
7-bits
7-bits
= 100ms max, T
2
C mode and then go into JTAG mode, or go out of and back
R/W
R/W
0
0
RESTORE
1-bit
1-bit
ACK Command Code ACK
ACK Command Code ACK
2
C/JTAG pin
SAVE
= 10 ms max
2
C, only two bytes are transferred. The Device Address is issued with the read/write bit set to "0", followed by the appropriate
) and restore (T
8-bits:xxxxxx01
8-bits:xxxxxx10
RESTORE
) instructions to complete is:
1-bit
1-bit
P
P
24
JTAG INSTRUCTION REGISTER
DESCRIPTION
NOTES:
1. IEEE 1149.1 definition
2. REGADDR is for setting a specific 5V9885C register address.
3. REGDATAW/PROGWRITE is for writing to the 5V9885C registers.
4. REGDATAR/PROGREAD is for reading the 5V9885C registers.
5. PROGSAVE is for saving all the contents of the 5V9885C registers to the EEPROM.
6. PROGRESTORE is for loading the entire EEPROM contents to the 5V9885C registers.
7. The OEMs bits for OUT1-6 must be set for tri-state when using the HIGHZ instruction
IR (3)
0
0
0
0
0
0
0
0
1
1
1
IR (2)
0
0
0
0
1
1
1
1
0
0
1
IR (1)
0
0
1
1
0
0
1
1
0
0
1
IR (0)
INDUSTRIAL TEMPERATURE RANGE
0
1
0
1
0
1
0
1
0
1
1
EXTEST
SAMPLE/PRELOAD
IDCODE
REGADDR
REGDATAW / PROGWRITE
REGDATAR / PROGREAD
PROGSAVE
PROGRESTORE
CLAMP
HIGHZ
BYPASS
2
C bus should be interpreted
Instructions
(1,7)
(1)
(1)
(1)
(1)
(2)
(5)
(6)
(1)
(4)
(3)