IDT5V9885CPFI IDT, Integrated Device Technology Inc, IDT5V9885CPFI Datasheet - Page 35

• Manufacturer Part Number: IDT5V9885CPFI
• Description: IC CLK GEN 3.3V EEPROM 32-TQFP
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: Clock Generatorr

Specifications of IDT5V9885CPFI

• Pll: Yes with Bypass
• Input: LVCMOS, LVTTL, Crystal
• Output: LVCMOS, LVDS, LVPECL, LVTTL
• Number Of Circuits: 1
• Ratio - Input:output: 2:8
• Differential - Input:output: No/Yes
• Frequency - Max: 500MHz
• Divider/multiplier: Yes/Yes
• Voltage - Supply: 3.135 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 32-TQFP, 32-VQFP
• Frequency-max: 500MHz
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 5V9885CPFI

RAM (PROGRAMMING REGISTER) TABLES
IDT5V9885C
3.3V EEPROM PROGRAMMABLE CLOCK GENERATOR
ADDR
0x60
0x61
0x62
0x63
0x64
0x65
0x66
0x67
0x68
0x69
0x6A
0x6B
0x6C
0x6D
0x6E
0x6F
0x70
0x71
0x72
0x73
0x74
0x75
0x76
0x77
0x78
0x79
0x7A
0x7B
0x7C
0x7D
0x7E
0x7F
0x80
0x81
7
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
6
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
(Default Settings)
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
5
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
4
BIT #
3
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
2
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Hex Value
Register
Default
00
00
00
00
00
00
00
00
00
00
00
00
00
00
00
00
DITH0
DITH1
7
X2_0
SD0[3:0][11]
X2_1
SD1[3:0][11]
TSSC0[3:0]
TSSC1[3:0]
SD0[3:0][1]
SD0[3:0][3]
SD0[3:0][5]
SD0[3:0][7]
SD0[3:0][9]
SD1[3:0][1]
SD1[3:0][3]
SD1[3:0][5]
SD1[3:0][7]
SD1[3:0][9]
6
5
CERR
4
BIT #
SS_OFFSET0[5:0]
SS_OFFSET1[5:0]
3
2
NSSC0[3:0]
SD0[3:0][10]
NSSC1[3:0]
SD1[3:0][10]
SD0[3:0][0]
SD0[3:0][2]
SD0[3:0][4]
SD0[3:0][6]
SD0[3:0][8]
SD1[3:0][0]
SD1[3:0][2]
SD1[3:0][4]
SD1[3:0][6]
SD1[3:0][8]
35
1
0
CRC error in EEPROM
CERR = CRC error bit indicator ("1`" = CRC error)
SPREAD SPRECTRUM SETTINGS FOR PLL0
SS_OFFSET0=SS Fractional Offset/ First Sample (Unsigned);
TSSC0=# of PFD Cycles Per SS Cycle Step, TSSC="0000" for SSC off (Default);
NSSC0=# of SS Samples to Use from SS Memory (Default is "0");
DITH0=LSB DITHER on Σ, ("1"=dither on, "0"=off (Default));
X2_0=Σ∆ output x2, ("1"=x2, "0"=normal (Default));
SD0=Delta-encoded samples (unsigned); Waveform start with SS_OFFSET0, then SS_OFFSET0+SD0[0], etc. (Default is "0");
SPREAD SPRECTRUM SETTINGS FOR PLL1
SS_OFFSET1=SS Fractional Offset/ First Sample (Unsigned);
TSSC1=# of PFD Cycles Per SS Cycle Step, TSSC="0000" for SSC off (Default);
NSSC1=# of SS Samples to Use from SS Memory (Default is "0");
DITH1=LSB DITHER on Σ∆, ("1"=dither on, "0"=off (Default));
X2_1=Σ∆ output x2, ("1"=x2, "0"=off (Default));
SD1=Delta-encoded samples (unsigned); Waveform start with SS_OFFSET1, then SS_OFFSET1+SD1[0], etc. (Default is "0");
INDUSTRIAL TEMPERATURE RANGE
No Registers Exist
DESCRIPTION
Read-Only