IDT5V9885CPFI IDT, Integrated Device Technology Inc, IDT5V9885CPFI Datasheet - Page 34

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IDT5V9885CPFI

Manufacturer Part Number
IDT5V9885CPFI
Description
IC CLK GEN 3.3V EEPROM 32-TQFP
Manufacturer
IDT, Integrated Device Technology Inc
Type
Clock Generatorr
Datasheet

Specifications of IDT5V9885CPFI

Pll
Yes with Bypass
Input
LVCMOS, LVTTL, Crystal
Output
LVCMOS, LVDS, LVPECL, LVTTL
Number Of Circuits
1
Ratio - Input:output
2:8
Differential - Input:output
No/Yes
Frequency - Max
500MHz
Divider/multiplier
Yes/Yes
Voltage - Supply
3.135 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
32-TQFP, 32-VQFP
Frequency-max
500MHz
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
5V9885CPFI

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
IDT5V9885CPFI
Manufacturer:
IDT, Integrated Device Technology Inc
Quantity:
10 000
Part Number:
IDT5V9885CPFI8
Manufacturer:
IDT, Integrated Device Technology Inc
Quantity:
10 000
RAM (PROGRAMMING REGISTER) TABLES
IDT5V9885C
3.3V EEPROM PROGRAMMABLE CLOCK GENERATOR
ADDR
0x4A
0x4B
0x4C
0x4D
0x4E
0x4F
0x5A
0x5B
0x5C
0x5D
0x5E
0x5F
0x40
0x41
0x42
0x43
0x44
0x45
0x46
0x47
0x48
0x49
0x50
0x51
0x52
0x53
0x54
0x55
0x56
0x57
0x58
0x59
7
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
1
0
0
0
1
0
0
0
1
0
0
0
1
0
0
6
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
5
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
1
0
0
0
1
0
0
0
1
0
0
0
1
0
0
4
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
0
1
BIT #
0
0
0
0
0
0
0
0
0
0
0
0
0
0
3
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
1
0
0
1
1
0
0
1
1
0
0
0
1
0
0
2
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
1
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
1
0
0
0
1
0
0
0
1
0
0
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
1
0
0
0
1
0
0
0
1
0
0
1
1
0
0
Hex Value
Register
BB
BB
0C
BB
0C
BB
BB
00
00
00
00
00
00
00
00
00
00
00
00
00
00
00
00
00
00
00
00
00
00
03
00
00
Q2[1:0]_CONFIG1
Q3[1:0]_CONFIG1
Q4[1:0]_CONFIG1
Q5[1:0]_CONFIG1
Q6[1:0]_CONFIG1
7
OEM2[1:0]
OEM3[1:0]
OEM4[1:0]
OEM5[1:0]
OEM6[1:0]
6
PM2[1:0]_CONFIG1
PM3[1:0]_CONFIG1
PM4[1:0]_CONFIG1
PM5[1:0]_CONFIG1
PM6[1:0]_CONFIG1
5
SLEW2[1:0]
SLEW3[1:0]
SLEW4[1:0]
SLEW5[1:0]
SLEW6[1:0]
D2 [7:0]_CONFIG0
D2 [7:0]_CONFIG1
D2 [7:0]_CONFIG2
D2 [7:0]_CONFIG3
N2 [7:0]_CONFIG0
N2 [7:0]_CONFIG1
N2 [7:0]_CONFIG2
N2 [7:0]_CONFIG3
Q2[9:2]_CONFIG0
Q2[9:2]_CONFIG1
Q3[9:2]_CONFIG0
Q3[9:2]_CONFIG1
Q4[9:2]_CONFIG0
Q4[9:2]_CONFIG1
Q5[9:2]_CONFIG0
Q5[9:2]_CONFIG1
Q6[9:2]_CONFIG0
Q6[9:2]_CONFIG1
4
BIT #
INV4_1
INV5_1
Q2[1:0]_CONFIG0
Q3[1:0]_CONFIG0
Q4[1:0]_CONFIG0
Q5[1:0]_CONFIG0
Q6[1:0]_CONFIG0
3
INV4_0
INV5_0
N2[11:8]_CONFIG0
N2[11:8]_CONFIG1
N2[11:8]_CONFIG2
N2[11:8]_CONFIG3
INV2
INV 3
INV6
34
2
PM2[1:0]_CONFIG0
PM3[1:0]_CONFIG0
PM4[1:0]_CONFIG0
PM5[1:0]_CONFIG0
PM6[1:0]_CONFIG0
1
LVL4[1:0]
LVL5[1:0]
0
Configuring Output OUT4
INV4_1=Output Inversion for /OUT4 ("0"= Invert , "1"=Non-Invert (Default));
INV4_0=Output Inversion for OUT4 ("0"= Invert , "1"=Non-Invert (Default));
Configuring Output OUT5
INV5_1=Output Inversion for /OUT5 ("0"= Invert, "1"=Non-Invert (Default));
INV5_0=Output Inversion for OUT5 ("0"= Invert, "1"= Non-Invert (Default));
When using LVPE CL or LVDS outputs, SLE W5 must be set to '00'.
P LL2 INPUT DIVIDER D2 SE TTING
P LL2 MULTIPLIER SETTING
Total Multiplier Value
INVx
Configuring Output OUT2
INV2=Output Inversion for OUT2 ("0"= Non-Invert (Default), "1"=Invert);
S LEW2=Slew Rate Settings for OUT2 output ("00"= 2.75V/ns (Default), "01"=2V/ns, "10"=1.25V/ns, "11"=0.7V/ns);
INV5_1=Output Inversion for /OUT5 ("0"= Invert, "1"=Non-Invert (Default));
INV5_0=Output Inversion for OUT5 ("0"= Invert, "1"=Non-Invert (Default));
S LEW5=Slew rate settings for OUT5 output ("00"= 2.75V/ns (Defa ult), "0 1"=2V/ns, "10"=1.25V/ns, "11"=0.7V/ns);
OE M5= Output Enable Mode for OUT5 output, when used with OE5 bit and SHUTDOWN/OE pin ("0x" = Tri-state (Default), "10"=Park
Low, "11"=Park High);
LVL5=Output IO Stan dard Selection, ("00"=LVTTL (Default), "01"=LVDS, "10"=LV PECL, "11"=Reserved);
Q5[x:x]=Output Divider "Q5" Values (Default value is '2') - Support 2 output configurations when used in MFC mode;
P M5[x:x]=Divide Mode, ("00"=Divider Disabled;"01"=Divide by '1';"10"=Divide by 2; "11"=Divide by (Q+2) (Default));
(Note : To enable OUT5, PM5 register bit values for both CONFIG0 and CONFIG1 configurations must be non-zero.)
Configuring Output OUT3
INV3=Output Inversion for OUT3 ("0"= Non-Invert (Default), "1"=Invert);
S LEW3=Slew Rate Settings for OUT3 output ("00"= 2.75V/ns (Default), "01"=2V/ns, "10"=1.25V/ns, "11"=0.7V/ns);
PMx
OEMx Qx
SLEWx
INDUSTRIAL TEMPERATURE RANGE
DES CRIPTION

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