X1228S14IZ Intersil, X1228S14IZ Datasheet - Page 16

• Manufacturer Part Number: X1228S14IZ
• Description: IC RTC/CAL/SUP/ALRM 4K EE 14SOIC
• Manufacturer: Intersil
• Type: Clock/Calendar/EEPROMr

Specifications of X1228S14IZ

• Memory Size: 4K (512 x 8)
• Time Format: HH:MM:SS (12/24 hr)
• Date Format: YY-MM-DD-dd
• Interface: I²C, 2-Wire Serial
• Voltage - Supply: 2.7 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 14-SOIC (3.9mm Width), 14-SOL
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

LOW VOLTAGE RESET OPERATION
When a power failure occurs, and the voltage to the
part drops below a fixed v
issued to the host microcontroller. The circuitry moni-
tors the V
senses a preset threshold voltage. Power-up and
power-down waveforms are shown in Figure 4. The
Low Voltage Reset circuit is to be designed so the
RESET signal is valid down to 1.0V.
Figure 3. Watchdog Restart/Time Out
Figure 4. Power-on Reset and Low Voltage Reset
V
[OPTIONAL]
The X1228 is shipped with a standard V
(V
operating and storage conditions. However, in applica-
tions where the standard V
higher precision is needed in the V
X1228 threshold may be adjusted. The procedure is
described below, and uses the application of a nonvol-
atile write control signal.
CC
TRIP
THRESHOLD RESET PROCEDURE
) voltage. This value will not change over normal
RESET
CC
RESET
SDA
SCL
V
line with a voltage comparator which
CC
V
TRIP
Start
t
R
TRIP
16
TRIP
Note: All inputs are ignored during the active reset period (t
t
RSP
t
voltage, a reset pulse is
PURST
is not exactly right, or if
t
RSP
<t
WDO
Stop Start
TRIP
CC
value, the
threshold
t
RSP
t
>t
RPD
X1228
WDO
When the low voltage reset signal is active, the operation
of any in progress nonvolatile write cycle is unaffected,
allowing a nonvolatile write to continue as long as possi-
ble (down to the power-on reset voltage). The low volt-
age reset signal, when active, terminates in progress
communications to the device and prevents new com-
mands, to reduce the likelihood of data corruption.
Setting the V
It is necessary to reset the trip point before setting the
new value.
To set the new V
threshold voltage to the V
to the programming voltage V
address 01h. The stop bit following a valid write opera-
tion initiates the V
RESET to V
operation may take up to 10 milliseconds to complete
and also writes 00h to address 01h of the EEPROM
array.
t
PURST
t
RST
RST
CC
TRIP
).
to complete the operation. Note: this
TRIP
t
Voltage
RSP
TRIP
>t
voltage, apply the desired V
WDO
programming sequence. Bring
CC
t
F
pin and tie the RESET pin
P
. Then write data 00h to
t
RST
V
RVALID
May 18, 2006
FN8100.4
TRIP