X1288V14T1 Intersil, X1288V14T1 Datasheet - Page 8

• Manufacturer Part Number: X1288V14T1
• Description: IC RTC/CAL/CPU SUP EE 14-TSSOP
• Manufacturer: Intersil
• Type: Clock/Calendar/Supervisor/EEPROMr

Specifications of X1288V14T1

• Memory Size: 256K (32K x 8)
• Time Format: HH:MM:SS:hh (12/24 hr)
• Date Format: YY-MM-DD-dd
• Interface: I²C, 2-Wire Serial
• Voltage - Supply: 4.5 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 14-TSSOP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

V
V
DESCRIPTION
The X1288 device is a Real Time Clock with
clock/calendar, two polled alarms with integrated 32kx8
EEPROM, oscillator compensation, CPU Supervisor
(POR/LVS and WDT) and battery backup switch.
The oscillator uses an external, low-cost 32.768kHz
crystal. All compensation and trim components are
integrated on the chip. This eliminates several external
discrete components and a trim capacitor, saving board
area and component cost.
The Real-Time Clock keeps track of time with separate
registers for Hours, Minutes, Seconds and 1/100 of a
second. The Calendar has separate registers for Date,
Month, Year and Day-of-week. The calendar is correct
through 2099, with automatic leap year correction.
V
TRIP
RESET
(V
TRIP
Parameter
TRIP
TRIP
SDA
SCL
V
V
V
CC
CC
t
t
t
t
t
TRAN
VPH
THD
VPO
t
Programming Timing Diagram
VPS
TSU
V
Programming Parameters
V
programming parameters are not 100% Tested.
)
RP
P
tv
0 1 2 3 4 5 6 7
V
V
V
V
V
(Between successive adjustments)
V
(Between successive adjustments)
Programming Voltage
V
V
(Programmed at 25°C)
TRIP
TRIP
TRIP
TRIP
TRIP
TRIP
TRIP
TRIP
t
VPS
Program Enable Voltage Setup time
Program Enable Voltage Hold time
Setup time
Hold (stable) time
Program Enable Voltage Off time
Program Recovery Period
Programmed Voltage Range
Program variation after programming
AEh
8
0 1 2 3 4 5 6 7
Description
00h
V
P
= 15V
X1288
0 1 2 3 4 5 6 7
03h/01h
The powerful Dual Alarms can be set to any
Clock/Calendar value for a match. For instance, every
minute, every Tuesday, or 5:23 AM on March 21. The
alarms can be polled in the Status Register or provide a
hardware interrupt (IRQ Pin). There is a repeat mode for
the alarms allowing a periodic interrupt.
The PHZ/IRQ pin may be software selected to provide a
frequency output of 1 Hz, 100 Hz, or 32,768 Hz.
The X1288 device integrates CPU Supervisor func-tions
and a Battery Switch. There is a Power-On Reset
(RESET output) with typically 250 ms delay from power-
on. It will also assert RESET when Vcc goes below the
specified threshold. The Vtrip threshold is user repro-
grammable. There is a WatchDog Timer (WDT) with 3
selectable time-out periods (0.25s, 0.75s, 1.75s) and a
disabled setting. The watchdog activates the RESET pin
when it expires.
0 1 2 3 4 5 6 7
V
TRIP
Min.
1.7
-25
00h
10
10
14
1
1
1
0
t
t
VPH
TSU
Max.
+25
5.0
16
t
THD
t
VPO
t
RP
April 14, 2006
Units
V
mV
CC
ms
ms
µs
µs
µs
µs
V
V
FN8102.3