X1288V14T1 Intersil, X1288V14T1 Datasheet - Page 9

• Manufacturer Part Number: X1288V14T1
• Description: IC RTC/CAL/CPU SUP EE 14-TSSOP
• Manufacturer: Intersil
• Type: Clock/Calendar/Supervisor/EEPROMr

Specifications of X1288V14T1

• Memory Size: 256K (32K x 8)
• Time Format: HH:MM:SS:hh (12/24 hr)
• Date Format: YY-MM-DD-dd
• Interface: I²C, 2-Wire Serial
• Voltage - Supply: 4.5 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 14-TSSOP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

The device offers a backup power input pin. This V
pin allows the device to be backed up by battery or
SuperCap. The entire X1288 device is fully operational
from 2.7 to 5.5 volts and the clock/calendar portion of the
X1288 device remains fully operational down to 1.8 volts
(Standby Mode).
The X1288 device provides 256K bits of EEPROM with 8
modes of BlockLock™ control. The BlockLock allows a
safe, secure memory for critical user and configuration
data, while allowing a large user storage area.
PIN DESCRIPTIONS
Serial Clock (SCL)
The SCL input is used to clock all data into and out of the
device. The input buffer on this pin is always active (not
gated).
Serial Data (SDA)
SDA is a bidirectional pin used to transfer data into and
out of the device. It has an open drain output and may be
wire ORed with other open drain or open collector out-
puts. The input buffer is always active (not gated).
An open drain output requires the use of a pull-up resis-
tor. The output circuitry controls the fall time of the output
signal with the use of a slope controlled pull-down. The
circuit is designed for 400kHz 2-wire interface speed.
V
This input provides a backup supply voltage to the
device. V
the V
tery, a Supercap or tied to ground if not used.
RESET Output – RESET
This is a reset signal output. This signal notifies a host
processor that the watchdog time period has expired or
that the voltage has dropped below a fixed V
old. It is an open drain active LOW output. Recom-
mended value for the pullup resistor is 5kΩ. If unused, tie
to ground.
Programmable Frequency/Interrupt Output – PHZ/IRQ
This is either an output from the internal oscillator or an
interrupt signal output. It is a CMOS output.
RESET
BACK
V
NC
NC
NC
NC
X1
X2
SS
CC
supply fails. This pin can be connected to a bat-
BACK
1
2
3
4
5
6
7
8
16 Ld SOIC
supplies power to the device in the event
16
15
14
13
12
11
10
9
V
V
PHZ/IRQ
NC
NC
NC
SCL
SDA
CC
BACK
X1288
9
NC = No internal connection
RESET
V
NC
NC
NC
X1
X2
SS
14 Ld TSSOP
1
2
3
4
5
6
7
14
13
12
11
10
9
8
TRIP
V
V
PHZ/IRQ
NC
NC
SCL
SDA
thresh-
CC
BACK
BACK
X1288
When used as frequency output, this signal has a fre-
quency of 32.768kHz, 100Hz, 1Hz or inactive.
When used as interrupt output, this signal notifies a host
processor that an alarm has occurred and an action is
required. It is an active LOW output.
The control bits for this function are FO1 and FO0 and
are found in address 0011h of the Clock Control Memory
map. See “Programmable Frequency Output Bits - FO1,
FO0” on page 13.
X1, X2
The X1 and X2 pins are the input and output,
respectively, of an inverting amplifier. An external
32.768kHz quartz crystal is used with the X1288 to
supply a timebase for the real time clock. The
recommended crystal is a Citizen CFS206-32.768KDZF.
Internal compensation circuitry is included to form a
complete oscillator circuit. Care should be taken in the
placement of the crystal and the layout of the circuit.
Plenty of ground plane around the device and short
traces to X1 and X2 are highly recommended. See
Application section for more information.
POWER CONTROL OPERATION
The power control circuit accepts a V
input. The power control circuit powers the clock from
V
power the device from V
REAL TIME CLOCK OPERATION
The Real Time Clock (RTC) uses an external 32.768kHz
quartz crystal to maintain an accurate internal represen-
tation of the 1/100 of a second, second, minute, hour,
day, date, month, and year. The RTC has leap-year cor-
rection. The clock also corrects for months having fewer
than 31 days and has a bit that controls 24 hour or
AM/PM format. When the X1288 powers up after the loss
of both V
least one byte is written to the clock register.
BACK
V
BACK
FIGURE 2. RECOMMENDED CRYSTAL CONNECTION
when V
CC
and V
FIGURE 3. POWER CONTROL
CC
Off
BACK
< V
V
BACK
CC
, the clock will not operate until at
CC
when V
- 0.2V. It will switch back to
X1
X2
Voltage
CC
exceeds V
CC
and a V
On
April 14, 2006
BACK
FN8102.3
BACK
.
In