EP4CE55F29C8LN Altera, EP4CE55F29C8LN Datasheet - Page 187

• Manufacturer Part Number: EP4CE55F29C8LN
• Description: IC CYCLONE IV FPGA 55K 780FBGA
• Manufacturer: Altera
• Series: CYCLONE® IV Er

Specifications of EP4CE55F29C8LN

• Number Of Logic Elements/cells: 55856
• Number Of Labs/clbs: 3491
• Total Ram Bits: 2340000
• Number Of I /o: 374
• Voltage - Supply: 0.97 V ~ 1.03 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 780-FBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -

Chapter 8: Configuration and Remote System Upgrades in Cyclone IV Devices
Configuration
© December 2010 Altera Corporation
f
1
During device configuration, Cyclone IV E devices read configuration data using the
parallel interface and configure their SRAM cells. This scheme is referred to as the AP
configuration scheme because the device controls the configuration interface. This
scheme contrasts with the FPP configuration scheme, where an external host controls
the interface.
AP Configuration Supported Flash Memories
The AP configuration controller in Cyclone IV E devices is designed to interface with
two industry-standard flash families—the Numonyx StrataFlash
Memory P30 flash family and the Numonyx StrataFlash Embedded Memory P33 flash
family. Unlike serial configuration devices, both of the flash families supported in AP
configuration scheme are designed to interface with microprocessors. By configuring
from an industry standard microprocessor flash which allows access to the flash after
entering user mode, the AP configuration scheme allows you to combine
configuration data and user data (microprocessor boot code) on the same flash
memory.
The Numonyx P30 flash family and the P33 flash family support a continuous
synchronous burst read mode at 40 MHz DCLK frequency for reading data from the
flash. Additionally, the Numonyx P30 and P33 flash families have identical pin-out
and adopt similar protocols for data access.
Cyclone IV E devices use a 40-MHz oscillator for the AP configuration scheme. The
oscillator is the same oscillator used in the Cyclone IV E AS configuration scheme.
Table 8–8
configuration scheme.
Table 8–8. Supported Commodity Flash for AP Configuration Scheme for Cyclone IV E
Devices
Configuring Cyclone IV E devices from the Numonyx P30 and P33 family 512-Mbit
flash memory is possible, but you must properly drive the extra address and
FLASH_nCE pins as required by these flash memories.
To check for supported speed grades and package options, refer to the respective flash
datasheets.
The AP configuration scheme in Cyclone IV E devices supports flash speed grades of
40 MHz and above. However, AP configuration for all these speed grades must be
capped at 40 MHz. The advantage of faster speed grades is realized when your design
in the Cyclone IV E devices accesses flash memory in user mode.
Notes to
(1) The AP configuration scheme only supports flash memory speed grades of 40 MHz and above.
(2) 3.3- , 3.0-, 2.5-, and 1.8-V I/O options are supported for the Numonyx P30 flash family.
(3) 3.3-, 3.0- and 2.5-V I/O options are supported for the Numonyx P33 flash family.
Flash Memory Density
Table
(Note 1)
lists the supported families of the commodity parallel flash for the AP
128 Mbit
256 Mbit
64 Mbit
8–8:
Numonyx P30 Flash Family
v
v
v
(2)
Cyclone IV Device Handbook, Volume 1
Numonyx P33 Flash Family
®
Embedded
v
v
v
8–21
(3)