EP1S20F484C6N Altera, EP1S20F484C6N Datasheet - Page 354

IC STRATIX FPGA 20K LE 484-FBGA

EP1S20F484C6N

Manufacturer Part Number
EP1S20F484C6N
Description
IC STRATIX FPGA 20K LE 484-FBGA
Manufacturer
Altera
Series
Stratix®r
Datasheet

Specifications of EP1S20F484C6N

Number Of Logic Elements/cells
18460
Number Of Labs/clbs
1846
Total Ram Bits
1669248
Number Of I /o
361
Voltage - Supply
1.425 V ~ 1.575 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
484-FBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
EP1S20F484C6N
Manufacturer:
ALTERA
Quantity:
534
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EP1S20F484C6N
Manufacturer:
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Quantity:
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Part Number:
EP1S20F484C6N
Manufacturer:
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0
Clocking
1–44
Stratix Device Handbook, Volume 2
GCLK0
GCLK1
GCLK2
GCLK3
GCLK4
GCLK5
GCLK6
GCLK7
GCLK8
GCLK9
GCLK10
GCLK11
GCLK12
GCLK13
GCLK14
GCLK15
RCLK0
RCLK1
RCLK2
RCLK3
RCLK4
RCLK5
Table 1–15. Stratix Global & Regional Clock Output Line Sharing for Enhanced & Fast PLLs (Part 1 of 2)
Network
Clock
PLL 1
(1)
v
v
v
v
v
v
v
v
PLL 2
(1)
v
v
v
v
v
v
v
v
Table 1–15
outputs to for Stratix devices.
clock network each of the CLK and
the PLL.
PLL 3
All Devices
(1)
v
v
v
v
PLL 4
(1)
v
v
v
v
shows the global and regional clocks that each PLL drives
PLL 5
(2)
v
v
v
v
v
v
PLL 6
(2)
v
v
v
v
Table 1–16
PLL 7
EP1S30, EP1S40, EP1S60 &
(1)
v
v
v
v
v
v
EP1S80 Devices Only
FPLLCLK
PLL 8
(1)
v
v
v
v
v
v
shows the global and regional
pins drive when bypassing
9
PLL
v
v
v
v
(1)
10
PLL
v
v
v
v
(1)
Altera Corporation
11
Devices Only
EP1S40 (5),
PLL
v
v
v
v
v
v
EP1S60 &
EP1S80
(2)
July 2005
12
PLL
v
v
v
v
(2)

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