EP1S20F484C6N Altera, EP1S20F484C6N Datasheet - Page 861

• Manufacturer Part Number: EP1S20F484C6N
• Description: IC STRATIX FPGA 20K LE 484-FBGA
• Manufacturer: Altera
• Series: Stratix®r

Specifications of EP1S20F484C6N

• Number Of Logic Elements/cells: 18460
• Number Of Labs/clbs: 1846
• Total Ram Bits: 1669248
• Number Of I /o: 361
• Voltage - Supply: 1.425 V ~ 1.575 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 484-FBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -

Board Layout
Altera Corporation
January 2005
EP1C12 maximum power-up current requirement
Maximum output current required
Voltage regulator selection
LTC1649
Nominal efficiency ( )
Line and load regulation
Minimum input voltage (V
Maximum input current
EL7562C
Nominal efficiency ( )
Line and load regulation
Minimum input voltage (V
Maximum input current
Table 14–8. Voltage Regulator Selection Process for EP1C12F324C Design (Part 2 of 2)
See Power Consumption section of the Cyclone FPGA Family
Data Sheet for other densities
Compare I
See Linear Technology LTC 1649 data sheet
See Intersil (Elantec) EL7562C data sheet
Line regulation + load regulation = (0.17 mV + 7 mV)/ 1.5 V
(V
I
Line regulation + load regulation = (0.17 mV + 7 mV)/ 1.5 V
(V
I
IN, DC(MAX)
IN, DC(MAX)
IN(MIN)
IN(MIN)
) = V
) = V
C C
= (V
= (V
IN
IN
with I
(1 – V
(1 – V
OUT
OUT
P U C ( M A X )
I
I
IN
IN
OUT(MAX)
OUT(MAX)
IN(MIN)
IN(MIN)
) = 3.3V(1 – 0.05)
) = 3.3V(1 – 0.05)
Laying out a printed circuit board (PCB) properly is extremely important
in high-frequency ( 100 kHz) switching regulator designs. A poor PCB
layout results in increased EMI and ground bounce, which affects the
reliability of the voltage regulator by obscuring important voltage and
current feedback signals. Altera recommends using Gerber files
designed layout files supplied by the regulator vendor for your board
layout.
If you cannot use the supplied layout files, contact the voltage regulator
vendor for help on re-designing the board to fit your design requirements
while maintaining the proper functionality.
Altera recommends that you use separate layers for signals, the ground
plane, and voltage supply planes. You can support separate layers by
using multi-layer PCBs, assuming you are using two signal layers.
)
)
)/(
)/(
V
V
IN(MIN)
IN(MIN)
)
)
100%
100%
Nominal efficiency ( ) = > 90%
Nominal efficiency ( ) = > 95%
EL7562C I
LTC1649 I
Stratix Device Handbook, Volume 2
Designing with 1.5-V Devices
Line and Load
Line and Load
Regulation = 0.478% < 5%
Regulation = 0.5% < 5%
I
I
I
I
P U C ( M A X )
O U T ( M A X )
O U T ( M A X )
O U T ( M A X )
IN, DC(MAX)
IN, DC(MAX)
(V
(V
IN(MIN)
IN(MIN)
) = 3.135 V
) = 3.135 V
= 900 mA
= 900 mA
=
=
= 478 mA < 2 A
= 453 mA < 2 A
15 A
2 A
pre-
14–21