EP1S20F484C6N Altera, EP1S20F484C6N Datasheet - Page 766

• Manufacturer Part Number: EP1S20F484C6N
• Description: IC STRATIX FPGA 20K LE 484-FBGA
• Manufacturer: Altera
• Series: Stratix®r

Specifications of EP1S20F484C6N

• Number Of Logic Elements/cells: 18460
• Number Of Labs/clbs: 1846
• Total Ram Bits: 1669248
• Number Of I /o: 361
• Voltage - Supply: 1.425 V ~ 1.575 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 484-FBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -

Configuration Schemes
Figure 11–26. Jam Player Flow Diagram (Part 2 of 2)
11–48
Stratix Device Handbook, Volume 2
Shift-DR
Set TMS to 0
and Pulse TCK,
Write TDI, and
Store TDO
DR Length
Loop<
T
F
Execution of a Jam program starts at the beginning of the program. The
program flow is controlled using GOTO, CALL/RETURN, and FOR/NEXT
structures. The GOTO and CALL statements see labels that are symbolic
names for program statements located elsewhere in the Jam program. The
language itself enforces almost no constraints on the organizational
structure or control flow of a program.
1
and Pulse TCK
and Store TDO
Set TMS to 1
and Pulse TCK
and Pulse TCK
Set TMS to 0
Set TMS to 1
TDO Value
Correct
Switch
T
Exit1-DR
Update-IR
Run-Test/Idle
The Jam language does not support linking multiple Jam
programs together or including the contents of another file into
a Jam program.
Compare
F
Report
Error
Continued from
Part 1 of
Flow Diagram
Case[]
Set TMS to 1
and Pulse TCK
and Store TDO
Set TMS to 1
and Pulse TCK
Set TMS to 0
and Pulse TCK
Capture
Default
Switch
Exit1-DR
Update-IR
Run-Test/Idle
F
Set TMS to 0
and Pulse TCK,
Write TDI, and
Store TDO
DR Length
Set TMS to 1
and Pulse TCK
and Store TDO
Set TMS to 1
and Pulse TCK
Set TMS to 0
and Pulse TCK
Loop<
Switch
T
Exit1-DR
Update-IR
Run-Test/Idle
Altera Corporation
F
Set TMS to 0
and Pulse TCK
and Write TDI
DR Length
Loop<
T
July 2005