EP1SGX40GF1020I6 Altera, EP1SGX40GF1020I6 Datasheet - Page 115

• Manufacturer Part Number: EP1SGX40GF1020I6
• Description: IC STRATIX GX FPGA 40K 1020-FBGA
• Manufacturer: Altera
• Series: Stratix® GXr

Specifications of EP1SGX40GF1020I6

• Number Of Logic Elements/cells: 41250
• Number Of Labs/clbs: 4125
• Total Ram Bits: 3423744
• Number Of I /o: 624
• Voltage - Supply: 1.425 V ~ 1.575 V
• Mounting Type: Surface Mount
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 1020-FBGA
• Family Name: Stratix GX
• Number Of Logic Blocks/elements: 41250
• # I/os (max): 624
• Frequency (max): 5GHz
• Process Technology: SRAM
• Operating Supply Voltage (typ): 1.5V
• Logic Cells: 41250
• Ram Bits: 3423744
• Operating Supply Voltage (min): 1.425V
• Operating Supply Voltage (max): 1.575V
• Operating Temp Range: -40C to 100C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 1020
• Package Type: FC-FBGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Number Of Gates: -
• Lead Free Status / Rohs Status: Not Compliant

Altera Corporation
February 2005
Table 4–12
DSP block multipliers can optionally feed an adder/subtractor or
accumulator within the block depending on the configuration. This
makes routing to LEs easier, saves LE routing resources, and increases
performance, because all connections and blocks are within the DSP
block. Additionally, the DSP block input registers can efficiently
implement shift registers for FIR filter applications.
Figure 4–29
18
configuration of the DSP block.
Notes to
(1)
(2)
EP1SGX10
EP1SGX25
EP1SGX40
Table 4–12. DSP Blocks in Stratix GX Devices
×
Device
18-bit multiplier mode.
Each device has either the number of 9 × 9-, 18 × 18-, or 36 × 36-bit multipliers
shown. The total number of multipliers for each device is not the sum of all the
multipliers.
The number of supported multiply functions shown is based on signed/signed
or unsigned/unsigned implementations.
Table
shows the number of DSP blocks in each Stratix GX device.
shows the top-level diagram of the DSP block configured for
4–12:
DSP Blocks
10
14
6
Figure 4–30
Multipliers
Total 9
112
48
80
Stratix GX Device Handbook, Volume 1
×
9
shows the 9
Total 18
Multipliers
Notes
24
40
56
Stratix GX Architecture
×
×
(1),
9-bit multiplier
18
(2)
Total 36
Multipliers
10
14
6
×
4–49
36