Z8018010PSG Zilog, Z8018010PSG Datasheet - Page 315

• Manufacturer Part Number: Z8018010PSG
• Description: IC 10MHZ Z180 CMOS ENH MPU 64DIP
• Manufacturer: Zilog

Specifications of Z8018010PSG

• Processor Type: Z180
• Features: 8-Bit, Enhanced Z80 Megacell
• Speed: 10MHz
• Voltage: 5V
• Mounting Type: Through Hole
• Package / Case: 64-DIP (0.750", 19.05mm)
• Processor Series: Z8018xx
• Core: Z80
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 10 MHz
• Number Of Timers: 2
• Operating Supply Voltage: 0 V to 5 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: Through Hole
• Minimum Operating Temperature: 0 C
• Core Size: 8bit
• Cpu Speed: 10MHz
• Digital Ic Case Style: DIP
• No. Of Pins: 64
• Supply Voltage Range: 4.5V To 5.5V
• Operating Temperature Range: 0°C To +70°C
• Svhc: No SVHC (18-Jun-2010)
• Base Number: 8018010
• Rohs Compliant: Yes
• Clock Frequency: 10MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 269-3889; Z8018010PSG

Register
DMA Memory Address
Register
Channel 1B:
DMA I/O Address Register
Channel 1L:
DMA I/O Address Register
Channel 1H
DMA Byte Count Register
Channel 1L:
DMA Byte Count Register
Channel 1H:
DMA Status Register:
DMA Mode Register:
Table 57.
MAR1B
IAR1L
IAR1H
BCR1L
BCR1H
DSTAT
DMODE
Mnemonics Address
Internal I/O Registers (Continued)
2
2
2
2
2
3
3
A
B
C
E
F
0
1
Bits 0 - 2 are used for MAR1B
during RESET
during RESET
DM1,0
MMOD
0 0
0 1
1 0
R/W
1 1
R/W
bit
0
1
bit
Destination
Mode
Burst Mode
Cycle Steal Mode
DE1
1
—
0
R/W
I/O
M
M
M
Family MPU User Manual
R/W
—
1
DE0
0
DMA enable ch 1,0
DAR0+1
DAR0-1
DAR0 fixed
DAR0 fixed
Address
DWE1
DM1
R/W
Remarks
W
0
1
DWE0
DM0
Ch 0 Destination Mode 1,0
R/W
0
1
DMA Enable Bit Write Enable 1,0
W
SM1,0
0 0
0 1
1 0
1 1
SM1
DIE1
R/W
R/W
0
0
UM005003-0703
SM0
DIE0
Ch 0 Source Mode 1,0
DMA Interrupt Enable 1,0
R/W
R/W
Source
0
0
I/O
M
M
M
Z8018x
MMOD
R/W
—
0
1
Memory MODE select
SAR0+1
SAR0-1
SAR0 fixed
SAR0 fixed
Address
DME
—
1
0
R
DMA Master enable
299