MC68LC060ZU50 Freescale Semiconductor, MC68LC060ZU50 Datasheet - Page 283

• Manufacturer Part Number: MC68LC060ZU50
• Description: IC MPU 32BIT 68K 50MHZ 304-TBGA
• Manufacturer: Freescale Semiconductor

Specifications of MC68LC060ZU50

• Processor Type: M680x0 32-Bit
• Speed: 50MHz
• Voltage: 3.3V
• Mounting Type: Surface Mount
• Package / Case: 304-TBGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -

IEEE 1149.1 Test (JTAG) and Debug Pipe Control Modes
9-22
"86
"87
"88
"89
"90
"91
"92
"93
"94
"95
"96
"97
"98
"99
--num cell
"100 (BC_2, TM(0),
"101 (BC_2, TLN(1), output3,
"102 (BC_2, R_W,
"103 (BC_2, SIZ(1), output3,
"104 (BC_2, *,
"105 (BC_2, SIZ(0), output3,
"106 (BC_2, TLN(0), output3,
"107 (BC_2, LOCKE,
"108 (BC_2, LOCK,
"109 (BC_2, *,
"110 (BC_2, BR,
"111 (BC_1, BB,
"112 (BC_2, *,
"113 (BC_2, BB,
"114 (BC_1, SNOOP,
"115 (BC_2, *,
"116 (BC_2, TIP,
"117 (BC_1, TS,
"118 (BC_2, *,
"119 (BC_2, TS,
--num cell
"120 (BC_1, BTT,
"121 (BC_2, *,
"122 (BC_2, BTT,
"123 (BC_2, *,
"124 (BC_2, SAS,
"125 (BC_2, PST(4), output3,
"126 (BC_2, PST(3), output3,
"127 (BC_2, *,
"128 (BC_2, PST(2), output3,
"129 (BC_2, PST(1), output3,
"130 (BC_2, PST(0), output3,
"131 (BC_1, TA,
"132 (BC_1, TEA,
"133 (BC_1, TRA,
"134 (BC_1, BG,
"135 (BC_1, BGR,
"136 (BC_1, TBI,
"137 (BC_1, AVEC,
"138 (BC_1, TCI,
(BC_2, *,
(BC_1, A(3),
(BC_2, A(3),
(BC_1, A(2),
(BC_2, A(2),
(BC_1, CLA,
(BC_2, *,
(BC_1, A(1),
(BC_2, A(1),
(BC_1, A(0),
(BC_2, A(0),
(BC_2, TM(2),
(BC_2, TM(1),
(BC_2, *,
port
port
control,
input,
output3,
input,
output3,
input,
control,
input,
output3,
input,
output3,
output3,
output3,
control,
function safe
output3,
output3,
control,
output3,
output3,
control,
output3,
input,
control,
output3,
input,
control,
output3,
input,
control,
output3,
function safe
input,
control,
output3,
control,
output3,
control,
input,
input,
input,
input,
input,
input,
input,
input,
M68060 USER’S MANUAL
0),
X),
X,
X),
X,
X),
0),
X),
X,
X),
X,
X,
X,
0),
X,
X,
X,
X,
0),
X,
X,
X,
X,
0),
X,
X),
0),
X,
X),
0),
X,
X),
0),
X,
X),
0),
X,
0),
X,
X,
X,
0),
X,
X,
X,
X),
X),
X),
X),
X),
X),
X),
X),
ccell dsval rslt
ccell dsval rslt
" & -- a[3:2]
" &
" &
" &
" & -- a[1:0]
" &
" &
"
104,
104,
"
104,
104,
109,
109,
"
127,
" &
" & -- bb
112,
" &
" & -- tip
115,
" &
" & -- ts
118,
" &
" & -- btt
121,
" & -- sas
123,
127,
127,
" & -- pst[4:0],br
127,
127,
127,
" &
" &
" &
" &
" &
" &
" &
" &
86,
86,
92,
92,
99,
99,
99,
99,
& -- tln(1),tm[2:0]
&
& -- lock,locke
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
-- tln(0),siz[1:0]
Z), " &
Z), " &
Z), " &
Z), " &
Z), " &
Z), " &
Z), " &
Z), " &
Z), " &
Z), " &
Z), " &
Z), " &
Z), " &
Z), " &
Z), " &
Z), " &
Z), " &
Z), " &
Z), " &
Z), " &
Z), " &
Z), " &
Z), " &
Z), " &
Z), " &
MOTOROLA