MC68LC060ZU50 Freescale Semiconductor, MC68LC060ZU50 Datasheet - Page 409

• Manufacturer Part Number: MC68LC060ZU50
• Description: IC MPU 32BIT 68K 50MHZ 304-TBGA
• Manufacturer: Freescale Semiconductor

Specifications of MC68LC060ZU50

• Processor Type: M680x0 32-Bit
• Speed: 50MHz
• Voltage: 3.3V
• Mounting Type: Surface Mount
• Package / Case: 304-TBGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -

LPSTOP
Operation:
Assembler
Syntax:
Attributes:
Description:
MOTOROLA
counter (PC) is advanced to the next instruction and the processor stops fetching and
executing instructions.
An interrupt or reset exception causes the processor to resume instruction execution
from an LPSTOP state. If an interrupt request is asserted with a higher priority than the
current priority level set by the new SR value, an interrupt exception occurs: otherwise
the interrupt request is ignored. An external reset always initiates reset exception pro-
cessing.
A trace exception occurs if the trace bit in the SR is enabled when the LPSTOP instruc-
tion begins execution.
A privilege violation is caused by attempting to clear the S-bit of the SR on LPSTOP.
The MC68060 executes the LPSTOP instruction as follows:
1. It synchronizes the pipelines.
2. An LPSTOP broadcast cycle is generated (write cycle):
If Supervisor State
Else TRAP
LPSTOP #<data>
Size = (Word) Privileged
TT1–TT0 = 3
TM2–TM0 = 0
SIZ1–SIZ0 = 2
31–A0 = $FFFFFFFE
D15–D0 = immediate data
Moves the immediate operand into the status register (SR). The program
Generate an LPSTOP Broadcast Cycle
Immediate Data SR
“10110” PST[4:0]
STOP
(MC68060, MC68LC060, MC68EC060)
M68060 USER’S MANUAL
Low-Power Stop
MC68060 Instructions
LPSTOP
D-19