CY7C63903-PVXC Cypress Semiconductor Corp, CY7C63903-PVXC Datasheet - Page 16

• Manufacturer Part Number: CY7C63903-PVXC
• Description: IC USB PERIPHERAL CTRLR 28-SSOP
• Manufacturer: Cypress Semiconductor Corp
• Series: CY7Cr

Specifications of CY7C63903-PVXC

• Controller Type: USB Peripheral Controller
• Interface: USB
• Voltage - Supply: 4 V ~ 5.5 V
• Current - Supply: 40mA
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 28-QSOP
• For Use With: 770-1001 - ISP 4PORT CYPRESS ENCORE II MCUCY4623 - KIT MOUSE REFERENCE DESIGN428-1774 - EXTENSION KIT FOR ENCORE II428-1773 - KIT DEVELOPMENT ENCORE II
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Document 38-08035 Rev. *E
The SRAM address of the first of the 64 bytes to be stored in
Flash must be indicated using the POINTER variable in the
parameter block (SRAM address FBh). Finally, the CLOCK
and DELAY value must be set correctly. The CLOCK value
determines the length of the write pulse that will be used to
store the data in the Flash. The CLOCK and DELAY values are
dependent on the CPU speed and must be set correctly. Refer
to “Clocking” Section for additional information.
Table 9-5. WriteBlock Parameters
9.5.4
The EraseBlock function is used to erase a block of 64
contiguous bytes in Flash. The first thing the EraseBlock
function does is to check the protection bits and determine if
the desired BLOCKID is writable. If write protection is turned
on, the EraseBlock function will exit setting the accumulator
and KEY2 back to 00h. KEY1 will have a value of 01h,
indicating a write failure. The EraseBlock function is only
useful as the first step in programming. Erasing a block will not
cause data in a block to be one hundred percent unreadable.
If the objective is to obliterate data in a block, the best method
is to perform an EraseBlock followed by a WriteBlock of all
zeros.
To set up the parameter block for the EraseBlock function,
correct key values must be stored in KEY1 and KEY2. The
block number to be erased must be stored in the BLOCKID
variable and the CLOCK and DELAY values must be set based
on the current CPU speed.
Table 9-6. EraseBlock Parameters
9.5.5
The enCoRe II devices offer Flash protection on a block-by-
block basis. Table 9-7 lists the protection modes available. In
the table, ER and EW are used to indicate the ability to perform
external reads and writes. For internal writes, IW is used.
KEY1
KEY2
BLOCKID
POINTER
CLOCK
DELAY
KEY1
KEY2
BLOCKID
CLOCK
DELAY
Name
Name
EraseBlock Function
ProtectBlock Function
0,F8h
0,F9h
0,FAh
0,FCh
0,FEh
Address
Address
0,FCh
0,FAh
0,FBh
0,FEh
0,F8h
0,F9h
3Ah
Stack Pointer value, when SSC is
executed.
8KB Flash block number (00h–7Fh)
4KB Flash block number (00h–3Fh)
3KB Flash block number (00h–2Fh)
First of 64 addresses in SRAM, where
the data to be stored in Flash is
located prior to calling WriteBlock.
Clock divider used to set the write
pulse width.
For a CPU speed of 12 MHz set to 56h
3Ah
executed.
pulse width.
56h
Stack Pointer value, when SSC is
Flash block number (00h–7Fh)
Clock divider used to set the erase
For a CPU speed of 12 MHz set to
Description
Description
Internal reading is always permitted by way of the ROMX
instruction. The ability to read by way of the SROM ReadBlock
function is indicated by SR. The protection level is stored in
two bits according to Table 9-7. These bits are bit packed into
the 64 bytes of the protection block. Therefore, each protection
block byte stores the protection level for four Flash blocks. The
bits are packed into a byte, with the lowest numbered block’s
protection level stored in the lowest numbered bits Table 9-7.
The first address of the protection block contains the
protection level for blocks 0 through 3; the second address is
for blocks 4 through 7. The 64th byte will store the protection
level for blocks 252 through 255.
Table 9-7. Protection Modes
The level of protection is only decreased by an EraseAll, which
places zeros in all locations of the protection block. To set the
level of protection, the ProtectBlock function is used. This
function takes data from SRAM, starting at address 80h, and
ORs it with the current values in the protection block. The
result of the OR operation is then stored in the protection
block. The EraseBlock function does not change the
protection level for a block. Because the SRAM location for the
protection data is fixed and there is only one protection block
per Flash macro, the ProtectBlock function expects very few
variables in the parameter block to be set prior to calling the
function. The parameter block values that must be set, besides
the keys, are the CLOCK and DELAY values.
Table 9-8. ProtectBlock Parameters
9.5.6
The EraseAll function performs a series of steps that destroy
the user data in the Flash macros and resets the protection
block in each Flash macro to all zeros (the unprotected state).
The EraseAll function does not affect the three hidden blocks
above the protection block, in each Flash macro. The first of
these four hidden blocks is used to store the protection table
for its eight Kbytes of user data.
The EraseAll function begins by erasing the user space of the
Flash macro with the highest address range. A bulk program
of all zeros is then performed on the same Flash macro, to
KEY1
KEY2
CLOCK
DELAY
Mode
Name
00b
01b
10b
11b
Block n+3
7
EraseAll Function
SR ER EW IW Unprotected
SR ER EW IW Read protect
SR ER EW IW Disable external
SR ER EW IW Disable internal
6
0,F8h
0,F9h
0,FCh
0,FEh
Address
Settings
Block n+2
5
3Ah
Stack Pointer value when SSC is
executed.
Clock divider used to set the write
pulse width.
For a CPU speed of 12 MHz set to 56h
write
write
4
Description
Block n+1
3
Description
CY7C63310
CY7C638xx
CY7C639xx
2
Unprotected
Factory upgrade
Field upgrade
Full protection
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Block n
0