CY7C63903-PVXC Cypress Semiconductor Corp, CY7C63903-PVXC Datasheet - Page 5

• Manufacturer Part Number: CY7C63903-PVXC
• Description: IC USB PERIPHERAL CTRLR 28-SSOP
• Manufacturer: Cypress Semiconductor Corp
• Series: CY7Cr

Specifications of CY7C63903-PVXC

• Controller Type: USB Peripheral Controller
• Interface: USB
• Voltage - Supply: 4 V ~ 5.5 V
• Current - Supply: 40mA
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 28-QSOP
• For Use With: 770-1001 - ISP 4PORT CYPRESS ENCORE II MCUCY4623 - KIT MOUSE REFERENCE DESIGN428-1774 - EXTENSION KIT FOR ENCORE II428-1773 - KIT DEVELOPMENT ENCORE II
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Document 38-08035 Rev. *E
5.1
Table 5-1. Pin Assignments
SSOP
42
43
34
35
36
37
38
39
40
41
15
14
13
12
10
48
11
7
6
9
8
P0.1/CLKOUT
PDIP
38
39
30
31
32
33
34
35
36
37
10
Pinouts Assignments
40
11
P0.0/CLKIN
3
2
9
8
7
6
5
4
P0.6/TIO1
P0.5/TIO0
P0.4/INT2
P0.3/INT1
P0.2/INT0
SSOP
P4.1
P4.0
P2.7
P2.6
P2.5
P2.3
P2.2
P2.1
P2.0
P0.7
P2.4
V
V
24
25
26
27
28
CC
SS
5
4
3
2
40-pin PDIP
CY7C63913
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
QSOP
20
19
10
24
11
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
SOIC
18
19
10
24
11
P4.2
P3.7
P3.1
P1.7
P1.4/SCLK
P1.3/SSEL
V
P4.3
P3.6
P3.5
P3.4
P3.2
P3.0
P1.6/SMISO
P1.5/SMOSI
P1.2/VREG
V
P1.1/D–
P1.0/D+
P3.3
SS
CC
PDIP
18
17
24
1
2
Figure 5-1 Package Configurations (continued)
SIOC
18
PDIP
P0.1/CLKOUT
18
P0.0/CLKIN
P0.6/TIO1
P0.5/TIO0
P0.4/INT2
P0.3/INT1
P0.2/INT0
SOIC
P4.1
P2.3
P2.2
P2.1
P2.0
P0.7
P4.0
P2.7
P2.6
P2.5
P2.4
16
V
V
NC
NC
NC
NC
CC
SS
48-pin SSOP
CY7C63923
PDIP
1
2
3
4
5
6
Top View
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
16
36
35
34
33
32
31
30
29
28
27
26
25
48
47
46
45
44
43
42
41
40
39
38
37
Pad
Die
42
43
34
35
36
37
38
39
40
41
15
14
13
12
10
11
7
6
9
8
P1.4/SCLK
P1.3/SSEL
NC
NC
P4.2
P3.7
P3.2
P3.1
P3.0
P1.7
P1.6/SMISO
P1.5/SMOSI
P1.2/VREG
V
P1.1/D–
NC
NC
V
P4.3
P3.6
P3.5
P3.4
P3.3
P1.0/D+
SS
CC
P4.0
P4.1
P4.2
P4.3
P3.0
P3.1
P3.2
P3.3
P3.4
P3.5
P3.6
P3.7
P2.0
P2.1
P2.2
P2.3
P2.4
P2.5
P2.6
P2.7
Name
P0.1/CLKOUT
P0.6/TIO1
P0.5/TIO0
P0.4/INT2
P0.2/INT0
P0.3/INT1
P2.6
P2.5
P2.4
P2.3
P2.2
P2.1
P2.0
P0.7
P4.0
P2.7
GPIO Port 4 – configured as a group
(nibble)
GPIO Port 3 – configured as a group
(byte)
GPIO Port 2 – configured as a group
(byte)
12
17
10
11
13
14
15
16
18
19
22
20
21
7
8
9
CY7C63923-XC
DIE
Description
CY7C63310
CY7C638xx
CY7C639xx
34
38
39
35
33
30
40
37
36
32
31
29
28
27
P3.6
P3.2
P3.1
P1.6/SMISO
P1.5/SMOSI
P1.3/SSEL
P1.2/VREG
P3.5
P3.4
P3.3
P1.4/SCLK
Page 5 of 68
P3.0
P1.7
V
CC